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Merge pull request #10793 from jeromecoutant/PR_STM32WARNING
STM32: remove compilation warnings
2 parents fbcae48 + 5ac7c8c commit 94d2a42

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43 files changed

+246
-243
lines changed

‎targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim.c

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -390,11 +390,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
390390
/* Check the parameters */
391391
assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
392392

393-
if((htim->State == HAL_TIM_STATE_BUSY))
393+
if(htim->State == HAL_TIM_STATE_BUSY)
394394
{
395395
return HAL_BUSY;
396396
}
397-
else if((htim->State == HAL_TIM_STATE_READY))
397+
else if(htim->State == HAL_TIM_STATE_READY)
398398
{
399399
if((pData == 0 ) && (Length > 0))
400400
{
@@ -784,11 +784,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
784784
/* Check the parameters */
785785
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
786786

787-
if((htim->State == HAL_TIM_STATE_BUSY))
787+
if(htim->State == HAL_TIM_STATE_BUSY)
788788
{
789789
return HAL_BUSY;
790790
}
791-
else if((htim->State == HAL_TIM_STATE_READY))
791+
else if(htim->State == HAL_TIM_STATE_READY)
792792
{
793793
if(((uint32_t)pData == 0U ) && (Length > 0U))
794794
{
@@ -1294,11 +1294,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
12941294
/* Check the parameters */
12951295
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
12961296

1297-
if((htim->State == HAL_TIM_STATE_BUSY))
1297+
if(htim->State == HAL_TIM_STATE_BUSY)
12981298
{
12991299
return HAL_BUSY;
13001300
}
1301-
else if((htim->State == HAL_TIM_STATE_READY))
1301+
else if(htim->State == HAL_TIM_STATE_READY)
13021302
{
13031303
if(((uint32_t)pData == 0U ) && (Length > 0U))
13041304
{
@@ -1777,11 +1777,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
17771777
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
17781778
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
17791779

1780-
if((htim->State == HAL_TIM_STATE_BUSY))
1780+
if(htim->State == HAL_TIM_STATE_BUSY)
17811781
{
17821782
return HAL_BUSY;
17831783
}
1784-
else if((htim->State == HAL_TIM_STATE_READY))
1784+
else if(htim->State == HAL_TIM_STATE_READY)
17851785
{
17861786
if((pData == 0U ) && (Length > 0U))
17871787
{
@@ -2592,11 +2592,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
25922592
/* Check the parameters */
25932593
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
25942594

2595-
if((htim->State == HAL_TIM_STATE_BUSY))
2595+
if(htim->State == HAL_TIM_STATE_BUSY)
25962596
{
25972597
return HAL_BUSY;
25982598
}
2599-
else if((htim->State == HAL_TIM_STATE_READY))
2599+
else if(htim->State == HAL_TIM_STATE_READY)
26002600
{
26012601
if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U))
26022602
{
@@ -3386,11 +3386,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint
33863386
assert_param(IS_TIM_DMA_LENGTH(BurstLength));
33873387
assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
33883388

3389-
if((htim->State == HAL_TIM_STATE_BUSY))
3389+
if(htim->State == HAL_TIM_STATE_BUSY)
33903390
{
33913391
return HAL_BUSY;
33923392
}
3393-
else if((htim->State == HAL_TIM_STATE_READY))
3393+
else if(htim->State == HAL_TIM_STATE_READY)
33943394
{
33953395
if((BurstBuffer == 0U ) && (BurstLength > 0U))
33963396
{
@@ -3656,11 +3656,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3
36563656
assert_param(IS_TIM_DMA_LENGTH(BurstLength));
36573657
assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
36583658

3659-
if((htim->State == HAL_TIM_STATE_BUSY))
3659+
if(htim->State == HAL_TIM_STATE_BUSY)
36603660
{
36613661
return HAL_BUSY;
36623662
}
3663-
else if((htim->State == HAL_TIM_STATE_READY))
3663+
else if(htim->State == HAL_TIM_STATE_READY)
36643664
{
36653665
if((BurstBuffer == 0U ) && (BurstLength > 0U))
36663666
{

‎targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim_ex.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -388,11 +388,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
388388
/* Check the parameters */
389389
assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
390390

391-
if((htim->State == HAL_TIM_STATE_BUSY))
391+
if(htim->State == HAL_TIM_STATE_BUSY)
392392
{
393393
return HAL_BUSY;
394394
}
395-
else if((htim->State == HAL_TIM_STATE_READY))
395+
else if(htim->State == HAL_TIM_STATE_READY)
396396
{
397397
if(((uint32_t)pData == 0U ) && (Length > 0U))
398398
{
@@ -693,11 +693,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
693693
/* Check the parameters */
694694
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
695695

696-
if((htim->State == HAL_TIM_STATE_BUSY))
696+
if(htim->State == HAL_TIM_STATE_BUSY)
697697
{
698698
return HAL_BUSY;
699699
}
700-
else if((htim->State == HAL_TIM_STATE_READY))
700+
else if(htim->State == HAL_TIM_STATE_READY)
701701
{
702702
if(((uint32_t)pData == 0U ) && (Length > 0U))
703703
{
@@ -1109,11 +1109,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
11091109
/* Check the parameters */
11101110
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
11111111

1112-
if((htim->State == HAL_TIM_STATE_BUSY))
1112+
if(htim->State == HAL_TIM_STATE_BUSY)
11131113
{
11141114
return HAL_BUSY;
11151115
}
1116-
else if((htim->State == HAL_TIM_STATE_READY))
1116+
else if(htim->State == HAL_TIM_STATE_READY)
11171117
{
11181118
if(((uint32_t)pData == 0U ) && (Length > 0U))
11191119
{

‎targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1765,7 +1765,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
17651765
{
17661766
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
17671767

1768-
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
1768+
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
17691769
{
17701770
/* Delay for temperature sensor stabilization time */
17711771
/* Compute number of CPU cycles to wait for */

‎targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc_ex.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1225,7 +1225,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
12251225
{
12261226
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
12271227

1228-
if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
1228+
if (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)
12291229
{
12301230
/* Delay for temperature sensor stabilization time */
12311231
/* Compute number of CPU cycles to wait for */

‎targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim.c

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -389,11 +389,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
389389
/* Check the parameters */
390390
assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
391391

392-
if((htim->State == HAL_TIM_STATE_BUSY))
392+
if(htim->State == HAL_TIM_STATE_BUSY)
393393
{
394394
return HAL_BUSY;
395395
}
396-
else if((htim->State == HAL_TIM_STATE_READY))
396+
else if(htim->State == HAL_TIM_STATE_READY)
397397
{
398398
if((pData == 0U) && (Length > 0U))
399399
{
@@ -781,11 +781,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
781781
/* Check the parameters */
782782
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
783783

784-
if((htim->State == HAL_TIM_STATE_BUSY))
784+
if(htim->State == HAL_TIM_STATE_BUSY)
785785
{
786786
return HAL_BUSY;
787787
}
788-
else if((htim->State == HAL_TIM_STATE_READY))
788+
else if(htim->State == HAL_TIM_STATE_READY)
789789
{
790790
if(((uint32_t)pData == 0U) && (Length > 0U))
791791
{
@@ -1289,11 +1289,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
12891289
/* Check the parameters */
12901290
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
12911291

1292-
if((htim->State == HAL_TIM_STATE_BUSY))
1292+
if(htim->State == HAL_TIM_STATE_BUSY)
12931293
{
12941294
return HAL_BUSY;
12951295
}
1296-
else if((htim->State == HAL_TIM_STATE_READY))
1296+
else if(htim->State == HAL_TIM_STATE_READY)
12971297
{
12981298
if(((uint32_t)pData == 0U) && (Length > 0U))
12991299
{
@@ -1770,11 +1770,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
17701770
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
17711771
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
17721772

1773-
if((htim->State == HAL_TIM_STATE_BUSY))
1773+
if(htim->State == HAL_TIM_STATE_BUSY)
17741774
{
17751775
return HAL_BUSY;
17761776
}
1777-
else if((htim->State == HAL_TIM_STATE_READY))
1777+
else if(htim->State == HAL_TIM_STATE_READY)
17781778
{
17791779
if((pData == 0U) && (Length > 0U))
17801780
{
@@ -2593,11 +2593,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
25932593
/* Check the parameters */
25942594
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
25952595

2596-
if((htim->State == HAL_TIM_STATE_BUSY))
2596+
if(htim->State == HAL_TIM_STATE_BUSY)
25972597
{
25982598
return HAL_BUSY;
25992599
}
2600-
else if((htim->State == HAL_TIM_STATE_READY))
2600+
else if(htim->State == HAL_TIM_STATE_READY)
26012601
{
26022602
if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U))
26032603
{
@@ -3340,11 +3340,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
33403340
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
33413341
assert_param(IS_TIM_DMA_LENGTH(BurstLength));
33423342

3343-
if((htim->State == HAL_TIM_STATE_BUSY))
3343+
if(htim->State == HAL_TIM_STATE_BUSY)
33443344
{
33453345
return HAL_BUSY;
33463346
}
3347-
else if((htim->State == HAL_TIM_STATE_READY))
3347+
else if(htim->State == HAL_TIM_STATE_READY)
33483348
{
33493349
if((BurstBuffer == 0U) && (BurstLength > 0U))
33503350
{
@@ -3563,11 +3563,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
35633563
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
35643564
assert_param(IS_TIM_DMA_LENGTH(BurstLength));
35653565

3566-
if((htim->State == HAL_TIM_STATE_BUSY))
3566+
if(htim->State == HAL_TIM_STATE_BUSY)
35673567
{
35683568
return HAL_BUSY;
35693569
}
3570-
else if((htim->State == HAL_TIM_STATE_READY))
3570+
else if(htim->State == HAL_TIM_STATE_READY)
35713571
{
35723572
if((BurstBuffer == 0U) && (BurstLength > 0U))
35733573
{

‎targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim_ex.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -393,11 +393,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
393393
/* Check the parameters */
394394
assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
395395

396-
if((htim->State == HAL_TIM_STATE_BUSY))
396+
if(htim->State == HAL_TIM_STATE_BUSY)
397397
{
398398
return HAL_BUSY;
399399
}
400-
else if((htim->State == HAL_TIM_STATE_READY))
400+
else if(htim->State == HAL_TIM_STATE_READY)
401401
{
402402
if(((uint32_t)pData == 0U) && (Length > 0U))
403403
{
@@ -683,11 +683,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
683683
/* Check the parameters */
684684
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
685685

686-
if((htim->State == HAL_TIM_STATE_BUSY))
686+
if(htim->State == HAL_TIM_STATE_BUSY)
687687
{
688688
return HAL_BUSY;
689689
}
690-
else if((htim->State == HAL_TIM_STATE_READY))
690+
else if(htim->State == HAL_TIM_STATE_READY)
691691
{
692692
if(((uint32_t)pData == 0U) && (Length > 0U))
693693
{
@@ -1056,11 +1056,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
10561056
/* Check the parameters */
10571057
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
10581058

1059-
if((htim->State == HAL_TIM_STATE_BUSY))
1059+
if(htim->State == HAL_TIM_STATE_BUSY)
10601060
{
10611061
return HAL_BUSY;
10621062
}
1063-
else if((htim->State == HAL_TIM_STATE_READY))
1063+
else if(htim->State == HAL_TIM_STATE_READY)
10641064
{
10651065
if(((uint32_t)pData == 0U) && (Length > 0U))
10661066
{

‎targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_usart.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2282,7 +2282,7 @@ static void USART_SetConfig(USART_HandleTypeDef *husart)
22822282
CLEAR_BIT(husart->Instance->CR3, (uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE));
22832283

22842284
/*-------------------------- USART BRR Configuration -----------------------*/
2285-
if((husart->Instance == USART1))
2285+
if(husart->Instance == USART1)
22862286
{
22872287
husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate);
22882288
}

‎targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_adc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1347,7 +1347,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
13471347
/* Enable the TSVREFE channel*/
13481348
ADC->CCR |= ADC_CCR_TSVREFE;
13491349

1350-
if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
1350+
if(sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
13511351
{
13521352
/* Delay for temperature sensor stabilization time */
13531353
/* Compute number of CPU cycles to wait for */

‎targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -668,11 +668,11 @@ static uint8_t FLASH_OB_GetRDP(void)
668668
{
669669
uint8_t readstatus = OB_RDP_LEVEL_0;
670670

671-
if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
671+
if(*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)
672672
{
673673
readstatus = OB_RDP_LEVEL_2;
674674
}
675-
else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
675+
else if(*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1)
676676
{
677677
readstatus = OB_RDP_LEVEL_1;
678678
}

‎targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_hcd.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -338,8 +338,8 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
338338
uint16_t length,
339339
uint8_t do_ping)
340340
{
341-
if ((hhcd->hc[ch_num].ep_is_in != direction)) {
342-
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL)){
341+
if (hhcd->hc[ch_num].ep_is_in != direction) {
342+
if (hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL){
343343
/* reconfigure the endpoint !!! from tx -> rx, and rx ->tx */
344344
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
345345
if (direction)

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