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| 1 | +/* |
| 2 | + * Copyright (c) 2019, Nuvoton Technology Corporation |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + * |
| 6 | + * Licensed under the Apache License, Version 2.0 (the "License"); |
| 7 | + * you may not use this file except in compliance with the License. |
| 8 | + * You may obtain a copy of the License at |
| 9 | + * |
| 10 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 11 | + * |
| 12 | + * Unless required by applicable law or agreed to in writing, software |
| 13 | + * distributed under the License is distributed on an "AS IS" BASIS, |
| 14 | + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 15 | + * See the License for the specific language governing permissions and |
| 16 | + * limitations under the License. |
| 17 | + */ |
| 18 | + |
| 19 | +#ifndef MBED_PERIPHERALNAMES_H |
| 20 | +#define MBED_PERIPHERALNAMES_H |
| 21 | + |
| 22 | +#include "cmsis.h" |
| 23 | + |
| 24 | +#ifdef __cplusplus |
| 25 | +extern "C" { |
| 26 | +#endif |
| 27 | + |
| 28 | +/* NOTE: Check all module base addresses (XXX_BASE in BSP) for free bit fields to define module name |
| 29 | + * which encodes module base address and module index/subindex. */ |
| 30 | +#define NU_MODSUBINDEX_Pos 0 |
| 31 | +#define NU_MODSUBINDEX_Msk (0x1Ful << NU_MODSUBINDEX_Pos) |
| 32 | +#define NU_MODINDEX_Pos 20 |
| 33 | +#define NU_MODINDEX_Msk (0xFul << NU_MODINDEX_Pos) |
| 34 | + |
| 35 | +#define NU_MODNAME(MODBASE, INDEX, SUBINDEX) ((MODBASE) | ((INDEX) << NU_MODINDEX_Pos) | ((SUBINDEX) << NU_MODSUBINDEX_Pos)) |
| 36 | +#define NU_MODBASE(MODNAME) ((MODNAME) & ~(NU_MODINDEX_Msk | NU_MODSUBINDEX_Msk)) |
| 37 | +#define NU_MODINDEX(MODNAME) (((MODNAME) & NU_MODINDEX_Msk) >> NU_MODINDEX_Pos) |
| 38 | +#define NU_MODSUBINDEX(MODNAME) (((MODNAME) & NU_MODSUBINDEX_Msk) >> NU_MODSUBINDEX_Pos) |
| 39 | + |
| 40 | +#if 0 |
| 41 | +typedef enum { |
| 42 | + GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0, 0), |
| 43 | + GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 1, 0), |
| 44 | + GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 2, 0), |
| 45 | + GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 3, 0), |
| 46 | + GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 4, 0), |
| 47 | + GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 5, 0) |
| 48 | +} GPIOName; |
| 49 | +#endif |
| 50 | + |
| 51 | +typedef enum { |
| 52 | + ADC_0_0 = (int) NU_MODNAME(EADC_BASE, 0, 0), |
| 53 | + ADC_0_1 = (int) NU_MODNAME(EADC_BASE, 0, 1), |
| 54 | + ADC_0_2 = (int) NU_MODNAME(EADC_BASE, 0, 2), |
| 55 | + ADC_0_3 = (int) NU_MODNAME(EADC_BASE, 0, 3), |
| 56 | + ADC_0_4 = (int) NU_MODNAME(EADC_BASE, 0, 4), |
| 57 | + ADC_0_5 = (int) NU_MODNAME(EADC_BASE, 0, 5), |
| 58 | + ADC_0_6 = (int) NU_MODNAME(EADC_BASE, 0, 6), |
| 59 | + ADC_0_7 = (int) NU_MODNAME(EADC_BASE, 0, 7), |
| 60 | + ADC_0_8 = (int) NU_MODNAME(EADC_BASE, 0, 8), |
| 61 | + ADC_0_9 = (int) NU_MODNAME(EADC_BASE, 0, 9), |
| 62 | + ADC_0_10 = (int) NU_MODNAME(EADC_BASE, 0, 10), |
| 63 | + ADC_0_11 = (int) NU_MODNAME(EADC_BASE, 0, 11), |
| 64 | + ADC_0_12 = (int) NU_MODNAME(EADC_BASE, 0, 12), |
| 65 | + ADC_0_13 = (int) NU_MODNAME(EADC_BASE, 0, 13), |
| 66 | + ADC_0_14 = (int) NU_MODNAME(EADC_BASE, 0, 14), |
| 67 | + ADC_0_15 = (int) NU_MODNAME(EADC_BASE, 0, 15) |
| 68 | +} ADCName; |
| 69 | + |
| 70 | +typedef enum { |
| 71 | + DAC_0_0 = (int) NU_MODNAME(DAC_BASE, 0, 0) |
| 72 | +} DACName; |
| 73 | + |
| 74 | +typedef enum { |
| 75 | + UART_0 = (int) NU_MODNAME(UART0_BASE, 0, 0), |
| 76 | + UART_1 = (int) NU_MODNAME(UART1_BASE, 1, 0), |
| 77 | + UART_2 = (int) NU_MODNAME(UART2_BASE, 2, 0), |
| 78 | + |
| 79 | + /* NOTE: board-specific */ |
| 80 | + STDIO_UART = UART_0 |
| 81 | +} UARTName; |
| 82 | + |
| 83 | +typedef enum { |
| 84 | + SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0, 0) |
| 85 | +} SPIName; |
| 86 | + |
| 87 | +typedef enum { |
| 88 | + I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0, 0), |
| 89 | + I2C_1 = (int) NU_MODNAME(I2C1_BASE, 1, 0) |
| 90 | +} I2CName; |
| 91 | + |
| 92 | +typedef enum { |
| 93 | + PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0, 0), |
| 94 | + PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 0, 1), |
| 95 | + PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 0, 2), |
| 96 | + PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 0, 3), |
| 97 | + PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 0, 4), |
| 98 | + PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 0, 5), |
| 99 | + |
| 100 | + PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 1, 0), |
| 101 | + PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1, 1), |
| 102 | + PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 1, 2), |
| 103 | + PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 1, 3), |
| 104 | + PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 1, 4), |
| 105 | + PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 1, 5) |
| 106 | +} PWMName; |
| 107 | + |
| 108 | +typedef enum { |
| 109 | + TIMER_0 = (int) NU_MODNAME(TIMER01_BASE, 0, 0), |
| 110 | + TIMER_1 = (int) NU_MODNAME(TIMER01_BASE + 0x100UL, 1, 0), |
| 111 | + TIMER_2 = (int) NU_MODNAME(TIMER23_BASE, 2, 0), |
| 112 | + TIMER_3 = (int) NU_MODNAME(TIMER23_BASE + 0x100UL, 3, 0) |
| 113 | +} TIMERName; |
| 114 | + |
| 115 | +typedef enum { |
| 116 | + RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0) |
| 117 | +} RTCName; |
| 118 | + |
| 119 | +typedef enum { |
| 120 | + DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0, 0) |
| 121 | +} DMAName; |
| 122 | + |
| 123 | +#ifdef __cplusplus |
| 124 | +} |
| 125 | +#endif |
| 126 | + |
| 127 | +#endif |
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