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Fix indentation in ER_IROM1 load region description
1 parent b31ce7a commit 9f5f3ea

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5 files changed

+15
-15
lines changed
  • targets/TARGET_ARM_SSG/TARGET_MPS2
    • TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD
    • TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD
    • TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD
    • TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD
    • TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD

5 files changed

+15
-15
lines changed

targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -68,9 +68,9 @@
6868

6969
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
7070
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
71-
*.o (RESET, +First)
72-
*(InRoot$$Sections)
73-
*(+RO)
71+
*.o (RESET, +First)
72+
*(InRoot$$Sections)
73+
*(+RO)
7474
}
7575

7676
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data

targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -68,9 +68,9 @@
6868

6969
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
7070
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
71-
*.o (RESET, +First)
72-
*(InRoot$$Sections)
73-
*(+RO)
71+
*.o (RESET, +First)
72+
*(InRoot$$Sections)
73+
*(+RO)
7474
}
7575

7676
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data

targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -69,9 +69,9 @@
6969

7070
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
7171
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
72-
*.o (RESET, +First)
73-
*(InRoot$$Sections)
74-
*(+RO)
72+
*.o (RESET, +First)
73+
*(InRoot$$Sections)
74+
*(+RO)
7575
}
7676

7777
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data

targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -69,9 +69,9 @@
6969

7070
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
7171
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
72-
*.o (RESET, +First)
73-
*(InRoot$$Sections)
74-
*(+RO)
72+
*.o (RESET, +First)
73+
*(InRoot$$Sections)
74+
*(+RO)
7575
}
7676

7777
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data

targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -70,9 +70,9 @@
7070

7171
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
7272
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
73-
*.o (RESET, +First)
74-
*(InRoot$$Sections)
75-
*(+RO)
73+
*.o (RESET, +First)
74+
*(InRoot$$Sections)
75+
*(+RO)
7676
}
7777

7878
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data

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