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  • targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG

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targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/system_clock.c

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -341,10 +341,11 @@ uint8_t SetSysClock_PLL_MSI(void)
341341
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */
343343
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
344-
/* Select LSE as clock source for LPUART1 */
345-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
346-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_LSE;
347-
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
344+
345+
/* Select LSE as clock source for LPUART1 */
346+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
347+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_LSE;
348+
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
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349350
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
350351
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);

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