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[M453] Fix EADC module is initialized multiple times
Also fix EADC module name EADC is hardcoded.
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‎targets/TARGET_NUVOTON/TARGET_M451/analogin_api.c

Lines changed: 20 additions & 74 deletions
Original file line numberDiff line numberDiff line change
@@ -23,76 +23,25 @@
2323
#include "PeripheralPins.h"
2424
#include "nu_modutil.h"
2525

26-
struct nu_adc_var {
27-
uint32_t en_msk;
28-
};
29-
30-
static struct nu_adc_var adc0_var = {
31-
.en_msk = 0
32-
};
33-
static struct nu_adc_var adc1_var = {
34-
.en_msk = 0
35-
};
36-
static struct nu_adc_var adc2_var = {
37-
.en_msk = 0
38-
};
39-
static struct nu_adc_var adc3_var = {
40-
.en_msk = 0
41-
};
42-
static struct nu_adc_var adc4_var = {
43-
.en_msk = 0
44-
};
45-
static struct nu_adc_var adc5_var = {
46-
.en_msk = 0
47-
};
48-
static struct nu_adc_var adc6_var = {
49-
.en_msk = 0
50-
};
51-
static struct nu_adc_var adc7_var = {
52-
.en_msk = 0
53-
};
54-
static struct nu_adc_var adc8_var = {
55-
.en_msk = 0
56-
};
57-
static struct nu_adc_var adc9_var = {
58-
.en_msk = 0
59-
};
60-
static struct nu_adc_var adc10_var = {
61-
.en_msk = 0
62-
};
63-
static struct nu_adc_var adc11_var = {
64-
.en_msk = 0
65-
};
66-
static struct nu_adc_var adc12_var = {
67-
.en_msk = 0
68-
};
69-
static struct nu_adc_var adc13_var = {
70-
.en_msk = 0
71-
};
72-
static struct nu_adc_var adc14_var = {
73-
.en_msk = 0
74-
};
75-
static struct nu_adc_var adc15_var = {
76-
.en_msk = 0
77-
};
26+
static uint32_t eadc_modinit_mask = 0;
7827

7928
static const struct nu_modinit_s adc_modinit_tab[] = {
80-
{ADC_0_0, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc0_var},
81-
{ADC_0_1, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc1_var},
82-
{ADC_0_2, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc2_var},
83-
{ADC_0_3, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc3_var},
84-
{ADC_0_4, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc4_var},
85-
{ADC_0_5, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc5_var},
86-
{ADC_0_6, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc6_var},
87-
{ADC_0_7, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc7_var},
88-
{ADC_0_8, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc8_var},
89-
{ADC_0_9, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc9_var},
90-
{ADC_0_10, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc10_var},
91-
{ADC_0_11, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc11_var},
92-
{ADC_0_12, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc12_var},
93-
{ADC_0_13, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc13_var},
94-
{ADC_0_14, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc14_var},
95-
{ADC_0_15, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc15_var},
29+
{ADC_0_0, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
30+
{ADC_0_1, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
31+
{ADC_0_2, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
32+
{ADC_0_3, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
33+
{ADC_0_4, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
34+
{ADC_0_5, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
35+
{ADC_0_6, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
36+
{ADC_0_7, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
37+
{ADC_0_8, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
38+
{ADC_0_9, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
39+
{ADC_0_10, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
40+
{ADC_0_11, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
41+
{ADC_0_12, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
42+
{ADC_0_13, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
43+
{ADC_0_14, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
44+
{ADC_0_15, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
9645
};
9746

9847
void analogin_init(analogin_t *obj, PinName pin)
@@ -107,7 +56,7 @@ void analogin_init(analogin_t *obj, PinName pin)
10756
EADC_T *eadc_base = (EADC_T *) NU_MODBASE(obj->adc);
10857

10958
// NOTE: All channels (identified by ADCName) share a ADC module. This reset will also affect other channels of the same ADC module.
110-
if (! ((struct nu_adc_var *) modinit->var)->en_msk) {
59+
if (! eadc_modinit_mask) {
11160
// Reset this module if no channel enabled
11261
SYS_ResetModule(modinit->rsetidx);
11362

@@ -116,9 +65,6 @@ void analogin_init(analogin_t *obj, PinName pin)
11665
// Enable clock of paired channels
11766
CLK_EnableModuleClock(modinit->clkidx);
11867

119-
// Power on ADC
120-
//ADC_POWER_ON(ADC);
121-
12268
// Set the ADC internal sampling time, input mode as single-end and enable the A/D converter
12369
EADC_Open(eadc_base, EADC_CTL_DIFFEN_SINGLE_END);
12470
EADC_SetInternalSampleTime(eadc_base, 6);
@@ -130,9 +76,9 @@ void analogin_init(analogin_t *obj, PinName pin)
13076
pinmap_pinout(pin, PinMap_ADC);
13177

13278
// Configure the sample module Nmod for analog input channel Nch and software trigger source
133-
EADC_ConfigSampleModule(EADC, chn, EADC_SOFTWARE_TRIGGER, chn);
79+
EADC_ConfigSampleModule(eadc_base, chn, EADC_SOFTWARE_TRIGGER, chn);
13480

135-
((struct nu_adc_var *) modinit->var)->en_msk |= 1 << chn;
81+
eadc_modinit_mask |= 1 << chn;
13682
}
13783

13884
uint16_t analogin_read_u16(analogin_t *obj)

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