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Squashed commit (pull request #1072)
commit 8e9e89f Author: bcostm <[email protected]> Date: Tue Apr 28 17:12:52 2015 +0200 [STM32L0] Change back AHBPresc table name commit 6433521 Author: bcostm <[email protected]> Date: Fri Apr 24 10:34:41 2015 +0200 [STM32_L0] hal improvements - pins settings - check STM32Cube HAL_Init return value commit 7b6a5ea Author: bcostm <[email protected]> Date: Fri Apr 24 10:32:12 2015 +0200 [NUCLEO_L073RZ] Improvements (same as NUCLEO_L053R8) commit 0a7f6d2 Author: bcostm <[email protected]> Date: Fri Apr 24 10:30:44 2015 +0200 [NUCLEO_L053R8] Improvements - Add new macro for pins setting (same as NUCLEO_F4) - Fix issue with constant tables commit 1f72ffe Author: bcostm <[email protected]> Date: Fri Apr 24 10:26:55 2015 +0200 [DISCO_L053C8] Alignment with NUCLEO_L0, add IAR compilation + exporter commit ed2d7dc Author: bcostm <[email protected]> Date: Fri Mar 20 11:10:03 2015 +0100 [NUCLEO_F091RC/F303RE] Fix wrong detect_code field
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‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/TOOLCHAIN_ARM_MICRO/startup_stm32l053xx.s

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
1-
;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
1+
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
22
;* File Name : startup_stm32l053xx.s
33
;* Author : MCD Application Team
4-
;* Version : V1.1.0
5-
;* Date : 18-June-2014
4+
;* Version : V1.2.0
5+
;* Date : 06-February-2015
66
;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain.
77
;* This module performs:
88
;* - Set the initial SP
@@ -12,9 +12,9 @@
1212
;* calls main()).
1313
;* After Reset the Cortex-M0+ processor is in Thread mode,
1414
;* priority is Privileged, and the Stack is set to Main.
15-
;* <<< Use Configuration Wizard in Context Menu >>>
15+
;* <<< Use Configuration Wizard in Context Menu >>>
1616
;*******************************************************************************
17-
;*
17+
;*
1818
;* Redistribution and use in source and binary forms, with or without modification,
1919
;* are permitted provided that the following conditions are met:
2020
;* 1. Redistributions of source code must retain the above copyright notice,

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/TOOLCHAIN_ARM_STD/startup_stm32l053xx.s

Lines changed: 5 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
1-
;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
1+
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
22
;* File Name : startup_stm32l053xx.s
33
;* Author : MCD Application Team
4-
;* Version : V1.1.0
5-
;* Date : 18-June-2014
4+
;* Version : V1.2.0
5+
;* Date : 06-February-2015
66
;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain.
77
;* This module performs:
88
;* - Set the initial SP
@@ -38,30 +38,8 @@
3838
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3939
;*
4040
;*******************************************************************************
41-
;
42-
; Amount of memory (in bytes) allocated for Stack
43-
; Tailor this value to your application needs
44-
; <h> Stack Configuration
45-
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
46-
; </h>
4741

48-
Stack_Size EQU 0x00000400
49-
50-
AREA STACK, NOINIT, READWRITE, ALIGN=3
51-
Stack_Mem SPACE Stack_Size
52-
__initial_sp
53-
54-
55-
; <h> Heap Configuration
56-
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
57-
; </h>
58-
59-
Heap_Size EQU 0x00000200
60-
61-
AREA HEAP, NOINIT, READWRITE, ALIGN=3
62-
__heap_base
63-
Heap_Mem SPACE Heap_Size
64-
__heap_limit
42+
__initial_sp EQU 0x20002000 ; Top of RAM
6543

6644
PRESERVE8
6745
THUMB
@@ -234,33 +212,4 @@ USB_IRQHandler
234212
ENDP
235213

236214
ALIGN
237-
238-
;*******************************************************************************
239-
; User Stack and Heap initialization
240-
;*******************************************************************************
241-
IF :DEF:__MICROLIB
242-
243-
EXPORT __initial_sp
244-
EXPORT __heap_base
245-
EXPORT __heap_limit
246-
247-
ELSE
248-
249-
IMPORT __use_two_region_memory
250-
EXPORT __user_initial_stackheap
251-
252-
__user_initial_stackheap
253-
254-
LDR R0, = Heap_Mem
255-
LDR R1, =(Stack_Mem + Stack_Size)
256-
LDR R2, = (Heap_Mem + Heap_Size)
257-
LDR R3, = Stack_Mem
258-
BX LR
259-
260-
ALIGN
261-
262-
ENDIF
263-
264-
END
265-
266-
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
215+
END

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/TOOLCHAIN_GCC_ARM/startup_stm32l053xx.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
******************************************************************************
33
* @file startup_stm32l053xx.s
44
* @author MCD Application Team
5-
* @version V1.1.0
6-
* @date 18-June-2014
5+
* @version V1.2.0
6+
* @date 06-February-2015
77
* @brief STM32L053xx Devices vector table for Atollic TrueSTUDIO toolchain.
88
* This module performs:
99
* - Set the initial SP

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/TOOLCHAIN_IAR/startup_stm32l053xx.s

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
1-
;/******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
1+
;/******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
22
;* File Name : startup_stm32l053xx.s
33
;* Author : MCD Application Team
4-
;* Version : V1.1.0
5-
;* Date : 18-June-2014
4+
;* Version : V1.2.0
5+
;* Date : 06-February-2015
66
;* Description : STM32L053xx Ultra Low Power Devices vector
77
;* This module performs:
88
;* - Set the initial SP

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/cmsis_nvic.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,6 @@
3232
#ifndef MBED_CMSIS_NVIC_H
3333
#define MBED_CMSIS_NVIC_H
3434

35-
// STM32L053R8
3635
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
3736
// MCU Peripherals: 32 vectors = 128 bytes from 0x40 to 0xBF
3837
// Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/system_stm32l0xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -147,7 +147,7 @@
147147
*/
148148
uint32_t SystemCoreClock = 32000000;
149149
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
150-
const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
150+
const uint8_t PLLMulTable_2[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
151151

152152
/**
153153
* @}
@@ -280,7 +280,7 @@ void SystemCoreClockUpdate (void)
280280
/* Get PLL clock source and multiplication factor ----------------------*/
281281
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
282282
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
283-
pllmul = PLLMulTable[(pllmul >> 18)];
283+
pllmul = PLLMulTable_2[(pllmul >> 18)];
284284
plldiv = (plldiv >> 22) + 1;
285285

286286
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_ARM_STD/startup_stm32l053xx.s

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ __Vectors DCD __initial_sp ; Top of Stack
101101
DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
102102
DCD LCD_IRQHandler ; LCD
103103
DCD USB_IRQHandler ; USB
104-
104+
105105
__Vectors_End
106106

107107
__Vectors_Size EQU __Vectors_End - __Vectors
@@ -112,7 +112,7 @@ __Vectors_Size EQU __Vectors_End - __Vectors
112112
Reset_Handler PROC
113113
EXPORT Reset_Handler [WEAK]
114114
IMPORT __main
115-
IMPORT SystemInit
115+
IMPORT SystemInit
116116
LDR R0, =SystemInit
117117
BLX R0
118118
LDR R0, =__main
@@ -191,7 +191,7 @@ TSC_IRQHandler
191191
DMA1_Channel1_IRQHandler
192192
DMA1_Channel2_3_IRQHandler
193193
DMA1_Channel4_5_6_7_IRQHandler
194-
ADC1_COMP_IRQHandler
194+
ADC1_COMP_IRQHandler
195195
LPTIM1_IRQHandler
196196
TIM2_IRQHandler
197197
TIM6_DAC_IRQHandler

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -147,7 +147,7 @@
147147
*/
148148
uint32_t SystemCoreClock = 32000000;
149149
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
150-
const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
150+
const uint8_t PLLMulTable_2[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
151151

152152
/**
153153
* @}
@@ -280,7 +280,7 @@ void SystemCoreClockUpdate (void)
280280
/* Get PLL clock source and multiplication factor ----------------------*/
281281
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
282282
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
283-
pllmul = PLLMulTable[(pllmul >> 18)];
283+
pllmul = PLLMulTable_2[(pllmul >> 18)];
284284
plldiv = (plldiv >> 22) + 1;
285285

286286
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/system_stm32l0xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -147,7 +147,7 @@
147147
*/
148148
uint32_t SystemCoreClock = 32000000;
149149
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
150-
const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
150+
const uint8_t PLLMulTable_2[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
151151

152152
/**
153153
* @}
@@ -280,7 +280,7 @@ void SystemCoreClockUpdate (void)
280280
/* Get PLL clock source and multiplication factor ----------------------*/
281281
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
282282
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
283-
pllmul = PLLMulTable[(pllmul >> 18)];
283+
pllmul = PLLMulTable_2[(pllmul >> 18)];
284284
plldiv = (plldiv >> 22) + 1;
285285

286286
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L0/PeripheralPins.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* mbed Microcontroller Library
22
*******************************************************************************
3-
* Copyright (c) 2014, STMicroelectronics
3+
* Copyright (c) 2015, STMicroelectronics
44
* All rights reserved.
55
*
66
* Redistribution and use in source and binary forms, with or without

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/PeripheralNames.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* mbed Microcontroller Library
22
*******************************************************************************
3-
* Copyright (c) 2014, STMicroelectronics
3+
* Copyright (c) 2015, STMicroelectronics
44
* All rights reserved.
55
*
66
* Redistribution and use in source and binary forms, with or without

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/PeripheralPins.c

Lines changed: 29 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* mbed Microcontroller Library
22
*******************************************************************************
3-
* Copyright (c) 2014, STMicroelectronics
3+
* Copyright (c) 2015, STMicroelectronics
44
* All rights reserved.
55
*
66
* Redistribution and use in source and binary forms, with or without
@@ -39,29 +39,23 @@
3939
//*** ADC ***
4040

4141
const PinMap PinMap_ADC[] = {
42-
{PA_0, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN0
43-
{PA_1, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN1
44-
{PA_2, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN2
45-
{PA_3, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN3
46-
{PA_4, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN4
47-
{PA_5, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN5
48-
{PA_6, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN6
49-
{PA_7, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN7
50-
{PB_0, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN8
51-
{PB_1, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN9
52-
{PC_0, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN10
53-
{PC_1, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN11
54-
{PC_2, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN12
55-
{PC_3, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN13
56-
{PC_4, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN14
57-
{PC_5, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN15
42+
{PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
43+
{PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
44+
{PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
45+
{PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
46+
{PA_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
47+
{PA_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
48+
{PA_6, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
49+
{PA_7, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
50+
{PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
51+
{PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
5852
{NC, NC, 0}
5953
};
6054

6155
//*** DAC ***
6256

6357
const PinMap PinMap_DAC[] = {
64-
{PA_4, DAC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // DAC_OUT
58+
{PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // DAC_OUT
6559
{NC, NC, 0}
6660
};
6761

@@ -87,25 +81,23 @@ const PinMap PinMap_I2C_SCL[] = {
8781

8882
// TIM21 cannot be used because already used by the us_ticker
8983
const PinMap PinMap_PWM[] = {
90-
{PA_0, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2)}, // TIM2_CH1
91-
{PA_1, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2)}, // TIM2_CH2
92-
// {PA_2, PWM_21, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM21)}, // TIM21_CH1
93-
// {PA_2, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2)}, // TIM2_CH3 - used by STDIO TX
94-
// {PA_3, PWM_21, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM21)}, // TIM21_CH2
95-
// {PA_3, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2)}, // TIM2_CH4 - used by STDIO RX
96-
{PA_5, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM2)}, // TIM2_CH1 - used also to drive the LED
97-
{PA_6, PWM_22, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM22)}, // TIM22_CH1
98-
{PA_7, PWM_22, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM22)}, // TIM22_CH2
99-
{PA_15, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM2)}, // TIM2_CH1
100-
{PB_3, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2)}, // TIM2_CH2
101-
{PB_4, PWM_22, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM22)}, // TIM22_CH1
102-
{PB_5, PWM_22, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM22)}, // TIM22_CH2
103-
{PB_10, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2)}, // TIM2_CH3
104-
{PB_11, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2)}, // TIM2_CH4
105-
// {PB_13, PWM_21, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM21)}, // TIM21_CH1
106-
// {PB_14, PWM_21, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM21)}, // TIM21_CH2
107-
{PC_6, PWM_22, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM22)}, // TIM22_CH1
108-
{PC_7, PWM_22, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM22)}, // TIM22_CH2
84+
// {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1 - Warning: user_button is on this pin
85+
{PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
86+
// {PA_2, PWM_21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM21, 1, 0)}, // TIM21_CH1
87+
// {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3 - used by STDIO TX
88+
// {PA_3, PWM_21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM21, 2, 0)}, // TIM21_CH2
89+
// {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4 - used by STDIO RX
90+
{PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM2, 1, 0)}, // TIM2_CH1 - used also to drive the LED
91+
{PA_6, PWM_22, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM22, 1, 0)}, // TIM22_CH1
92+
{PA_7, PWM_22, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM22, 2, 0)}, // TIM22_CH2
93+
{PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM2, 1, 0)}, // TIM2_CH1
94+
{PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
95+
{PB_4, PWM_22, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM22, 1, 0)}, // TIM22_CH1
96+
{PB_5, PWM_22, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM22, 2, 0)}, // TIM22_CH2
97+
{PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3
98+
{PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4
99+
// {PB_13, PWM_21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM21, 1, 0)}, // TIM21_CH1
100+
// {PB_14, PWM_21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM21, 2, 0)}, // TIM21_CH2
109101
{NC, NC, 0}
110102
};
111103

@@ -117,8 +109,6 @@ const PinMap PinMap_UART_TX[] = {
117109
{PA_14, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)}, // Warning: this pin is used by SWCLK
118110
{PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
119111
{PB_10, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_LPUART1)},
120-
{PC_4, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_LPUART1)},
121-
{PC_10, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_LPUART1)},
122112
{NC, NC, 0}
123113
};
124114

@@ -128,8 +118,6 @@ const PinMap PinMap_UART_RX[] = {
128118
{PA_15, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
129119
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
130120
{PB_11, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_LPUART1)},
131-
{PC_5, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_LPUART1)},
132-
{PC_11, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_LPUART1)},
133121
{NC, NC, 0}
134122
};
135123

@@ -140,7 +128,6 @@ const PinMap PinMap_SPI_MOSI[] = {
140128
{PA_12, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
141129
{PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
142130
{PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
143-
{PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_SPI2)},
144131
{NC, NC, 0}
145132
};
146133

@@ -149,7 +136,6 @@ const PinMap PinMap_SPI_MISO[] = {
149136
{PA_11, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
150137
{PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
151138
{PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
152-
{PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_SPI2)},
153139
{NC, NC, 0}
154140
};
155141

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