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Merge pull request #8737 from kapi90/cm3ds_lp_requirements
Add low power implementations for CM3DS
2 parents e72b7c3 + 5dd6d19 commit d7f2e30

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12 files changed

+2173
-171
lines changed

12 files changed

+2173
-171
lines changed

targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/device_cfg.h

Lines changed: 49 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
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/*
2-
* Copyright (c) 2018 ARM Limited
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* Copyright (c) 2018 Arm Limited
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*
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* Licensed under the Apache License Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
@@ -27,8 +27,54 @@
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*/
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/* CMSDK Timers */
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#define ARM_CMSDK_TIMER0
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#define ARM_CMSDK_TIMER1
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#define ARM_CMSDK_DUALTIMER
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/* Timer Peripherals are driven by APB System Core Clocks,
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* defined in system_CMSDK_CM3DS.c
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*/
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#define TIMERS_INPUT_CLOCK_FREQ_HZ 25000000U
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/* mbed usec high-resolution ticker configuration */
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#define USEC_TIMER_DEV CMSDK_TIMER1_DEV
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#define usec_interval_irq_handler TIMER1_IRQHandler
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#define USEC_INTERVAL_IRQ TIMER1_IRQn
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/* The us ticker uses CMSDK Timer1, that does not have HW prescaler.
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* The reported shift define is necessary for the software emulated
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* prescaler behavior, so the ticker works as if it was ticking on a
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* virtually slower frequency. The value 5 sets up the ticker to work
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* properly in the specified frequency interval.
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*/
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#define USEC_TIMER_BIT_WIDTH 32U
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#define USEC_REPORTED_SHIFT 5U
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#define USEC_REPORTED_FREQ_HZ (TIMERS_INPUT_CLOCK_FREQ_HZ >> \
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USEC_REPORTED_SHIFT)
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#define USEC_REPORTED_BITS (USEC_TIMER_BIT_WIDTH - USEC_REPORTED_SHIFT)
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/* mbed low power ticker configuration */
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#define LP_TIMER_DEV CMSDK_DUALTIMER_DEV
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#define lp_interval_irq_handler DUALTIMER_IRQHandler
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#define LP_INTERVAL_IRQ DUALTIMER_IRQn
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/* The lp ticker a CMSDK Dual Timer that is capable of prescaling
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* its input clock frequency by 256 at most. Having 25MHz as input
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* frequency requires an additional slowing factor in order for the ticker
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* to operate in the specified frequency interval, thus the effective
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* prescaler value is going to be the sum of the HW and the virtual
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* prescaler values.
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*/
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#define LP_TIMER_BIT_WIDTH 32U
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#define LP_TIMER_HW_PRESCALER 8U
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#define LP_REPORTED_SHIFT 1U
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#define LP_REPORTED_FREQ_HZ (TIMERS_INPUT_CLOCK_FREQ_HZ >> \
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(LP_TIMER_HW_PRESCALER+LP_REPORTED_SHIFT))
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#define LP_REPORTED_BITS (LP_TIMER_BIT_WIDTH - LP_REPORTED_SHIFT)
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/* RTC PL031 */
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#define RTC_PL031
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/* ARM GPIO */
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#define ARM_GPIO0
@@ -51,7 +97,7 @@
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#define ARM_SPI4
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/* ARM UART */
54-
#define DEFAULT_UART_BAUDRATE 9600
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#define DEFAULT_UART_BAUDRATE 9600U
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#define ARM_UART0
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#define ARM_UART1
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#define ARM_UART2

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