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Merge pull request #14339 from jeromecoutant/PR_F4_1260
STM32F4 update drivers version to CUBE V1.26.0
2 parents 3061725 + c41ea5f commit eec320c

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‎targets/TARGET_STM/README.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ This table summarizes the STM32Cube versions currently used in Mbed OS master br
6565
| F1 | 1.8.0 | https://github.com/STMicroelectronics/STM32CubeF1 |
6666
| F2 | 1.6.0 | https://github.com/STMicroelectronics/STM32CubeF2 |
6767
| F3 | 1.9.0 | https://github.com/STMicroelectronics/STM32CubeF3 |
68-
| F4 | 1.25.0 | https://github.com/STMicroelectronics/STM32CubeF4 |
68+
| F4 | 1.26.0 | https://github.com/STMicroelectronics/STM32CubeF4 |
6969
| F7 | 1.16.0 | https://github.com/STMicroelectronics/STM32CubeF7 |
7070
| G0 | 1.3.0 | https://github.com/STMicroelectronics/STM32CubeG0 |
7171
| G4 | 1.1.0 | https://github.com/STMicroelectronics/STM32CubeG4 |

‎targets/TARGET_STM/TARGET_STM32F4/CMakeLists.txt

Lines changed: 28 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,51 @@
11
# Copyright (c) 2020 ARM Limited. All rights reserved.
22
# SPDX-License-Identifier: Apache-2.0
33

4-
add_subdirectory(TARGET_MTS_DRAGONFLY_F411RE EXCLUDE_FROM_ALL)
5-
add_subdirectory(TARGET_MTS_MDOT_F411RE EXCLUDE_FROM_ALL)
64
add_subdirectory(TARGET_STM32F401xC EXCLUDE_FROM_ALL)
5+
add_subdirectory(TARGET_STM32F401xB EXCLUDE_FROM_ALL)
76
add_subdirectory(TARGET_STM32F401xE EXCLUDE_FROM_ALL)
7+
add_subdirectory(TARGET_STM32F401xD EXCLUDE_FROM_ALL)
8+
add_subdirectory(TARGET_STM32F405xG EXCLUDE_FROM_ALL)
9+
add_subdirectory(TARGET_STM32F405xE EXCLUDE_FROM_ALL)
810
add_subdirectory(TARGET_STM32F407xE EXCLUDE_FROM_ALL)
911
add_subdirectory(TARGET_STM32F407xG EXCLUDE_FROM_ALL)
12+
add_subdirectory(TARGET_STM32F410x8 EXCLUDE_FROM_ALL)
1013
add_subdirectory(TARGET_STM32F410xB EXCLUDE_FROM_ALL)
1114
add_subdirectory(TARGET_STM32F411xE EXCLUDE_FROM_ALL)
15+
add_subdirectory(TARGET_STM32F411xC EXCLUDE_FROM_ALL)
16+
add_subdirectory(TARGET_STM32F412xE EXCLUDE_FROM_ALL)
1217
add_subdirectory(TARGET_STM32F412xG EXCLUDE_FROM_ALL)
1318
add_subdirectory(TARGET_STM32F413xH EXCLUDE_FROM_ALL)
19+
add_subdirectory(TARGET_STM32F413xG EXCLUDE_FROM_ALL)
20+
add_subdirectory(TARGET_STM32F415xx EXCLUDE_FROM_ALL)
21+
add_subdirectory(TARGET_STM32F417xE EXCLUDE_FROM_ALL)
22+
add_subdirectory(TARGET_STM32F417xG EXCLUDE_FROM_ALL)
23+
add_subdirectory(TARGET_STM32F423xx EXCLUDE_FROM_ALL)
24+
add_subdirectory(TARGET_STM32F427xI EXCLUDE_FROM_ALL)
25+
add_subdirectory(TARGET_STM32F427xG EXCLUDE_FROM_ALL)
26+
add_subdirectory(TARGET_STM32F429xG EXCLUDE_FROM_ALL)
1427
add_subdirectory(TARGET_STM32F429xI EXCLUDE_FROM_ALL)
28+
add_subdirectory(TARGET_STM32F437xI EXCLUDE_FROM_ALL)
1529
add_subdirectory(TARGET_STM32F437xG EXCLUDE_FROM_ALL)
30+
add_subdirectory(TARGET_STM32F439xG EXCLUDE_FROM_ALL)
1631
add_subdirectory(TARGET_STM32F439xI EXCLUDE_FROM_ALL)
32+
add_subdirectory(TARGET_STM32F446xC EXCLUDE_FROM_ALL)
1733
add_subdirectory(TARGET_STM32F446xE EXCLUDE_FROM_ALL)
1834
add_subdirectory(TARGET_STM32F469xI EXCLUDE_FROM_ALL)
35+
add_subdirectory(TARGET_STM32F469xG EXCLUDE_FROM_ALL)
36+
add_subdirectory(TARGET_STM32F469xE EXCLUDE_FROM_ALL)
37+
add_subdirectory(TARGET_STM32F479xI EXCLUDE_FROM_ALL)
38+
add_subdirectory(TARGET_STM32F479xG EXCLUDE_FROM_ALL)
39+
1940
add_subdirectory(STM32Cube_FW EXCLUDE_FROM_ALL)
2041

2142
add_library(mbed-stm32f4 INTERFACE)
2243

44+
target_include_directories(mbed-stm32f4
45+
INTERFACE
46+
.
47+
)
48+
2349
target_sources(mbed-stm32f4
2450
INTERFACE
2551
analogin_device.c
@@ -31,9 +57,4 @@ target_sources(mbed-stm32f4
3157
spi_api.c
3258
)
3359

34-
target_include_directories(mbed-stm32f4
35-
INTERFACE
36-
.
37-
)
38-
3960
target_link_libraries(mbed-stm32f4 INTERFACE mbed-stm mbed-stm32f4cube-fw)

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_SDP_K1/PeripheralNames.h renamed to ‎targets/TARGET_STM/TARGET_STM32F4/PeripheralNames.h

Lines changed: 88 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -1,33 +1,18 @@
11
/* mbed Microcontroller Library
2-
*******************************************************************************
32
* SPDX-License-Identifier: BSD-3-Clause
4-
* Copyright (c) 2014, STMicroelectronics
5-
* All rights reserved.
3+
******************************************************************************
64
*
7-
* Redistribution and use in source and binary forms, with or without
8-
* modification, are permitted provided that the following conditions are met:
5+
* Copyright (c) 2015-2021 STMicroelectronics.
6+
* All rights reserved.
97
*
10-
* 1. Redistributions of source code must retain the above copyright notice,
11-
* this list of conditions and the following disclaimer.
12-
* 2. Redistributions in binary form must reproduce the above copyright notice,
13-
* this list of conditions and the following disclaimer in the documentation
14-
* and/or other materials provided with the distribution.
15-
* 3. Neither the name of STMicroelectronics nor the names of its contributors
16-
* may be used to endorse or promote products derived from this software
17-
* without specific prior written permission.
8+
* This software component is licensed by ST under BSD 3-Clause license,
9+
* the "License"; You may not use this file except in compliance with the
10+
* License. You may obtain a copy of the License at:
11+
* opensource.org/licenses/BSD-3-Clause
1812
*
19-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20-
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21-
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
23-
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24-
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25-
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
26-
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27-
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28-
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29-
*******************************************************************************
13+
******************************************************************************
3014
*/
15+
3116
#ifndef MBED_PERIPHERALNAMES_H
3217
#define MBED_PERIPHERALNAMES_H
3318

@@ -39,68 +24,144 @@ extern "C" {
3924

4025
typedef enum {
4126
ADC_1 = (int)ADC1_BASE,
27+
#if defined ADC2_BASE
4228
ADC_2 = (int)ADC2_BASE,
29+
#endif
30+
#if defined ADC3_BASE
4331
ADC_3 = (int)ADC3_BASE
32+
#endif
4433
} ADCName;
4534

35+
#if defined DAC_BASE
4636
typedef enum {
4737
DAC_1 = (int)DAC_BASE
4838
} DACName;
39+
#endif
4940

5041
typedef enum {
5142
UART_1 = (int)USART1_BASE,
43+
#if defined USART2_BASE
5244
UART_2 = (int)USART2_BASE,
45+
#endif
46+
#if defined USART3_BASE
5347
UART_3 = (int)USART3_BASE,
48+
#endif
49+
#if defined UART4_BASE
5450
UART_4 = (int)UART4_BASE,
51+
#endif
52+
#if defined UART5_BASE
5553
UART_5 = (int)UART5_BASE,
54+
#endif
55+
#if defined USART6_BASE
5656
UART_6 = (int)USART6_BASE,
57+
#endif
58+
#if defined UART7_BASE
5759
UART_7 = (int)UART7_BASE,
58-
UART_8 = (int)UART8_BASE
60+
#endif
61+
#if defined UART8_BASE
62+
UART_8 = (int)UART8_BASE,
63+
#endif
64+
#if defined UART9_BASE
65+
UART_9 = (int)UART9_BASE,
66+
#endif
67+
#if defined UART10_BASE
68+
UART_10 = (int)UART10_BASE,
69+
#endif
5970
} UARTName;
6071

6172
#define DEVICE_SPI_COUNT 6
6273
typedef enum {
6374
SPI_1 = (int)SPI1_BASE,
75+
#if defined SPI2_BASE
6476
SPI_2 = (int)SPI2_BASE,
77+
#endif
78+
#if defined SPI3_BASE
6579
SPI_3 = (int)SPI3_BASE,
80+
#endif
81+
#if defined SPI4_BASE
6682
SPI_4 = (int)SPI4_BASE,
83+
#endif
84+
#if defined SPI5_BASE
6785
SPI_5 = (int)SPI5_BASE,
86+
#endif
87+
#if defined SPI6_BASE
6888
SPI_6 = (int)SPI6_BASE
89+
#endif
6990
} SPIName;
7091

7192
typedef enum {
7293
I2C_1 = (int)I2C1_BASE,
94+
#if defined I2C2_BASE
7395
I2C_2 = (int)I2C2_BASE,
74-
I2C_3 = (int)I2C3_BASE
96+
#endif
97+
#if defined I2C3_BASE
98+
I2C_3 = (int)I2C3_BASE,
99+
#endif
100+
#if defined FMPI2C1_BASE
101+
FMPI2C_1 = (int)FMPI2C1_BASE
102+
#endif
75103
} I2CName;
76104

77105
typedef enum {
78106
PWM_1 = (int)TIM1_BASE,
107+
#if defined TIM2_BASE
79108
PWM_2 = (int)TIM2_BASE,
109+
#endif
110+
#if defined TIM3_BASE
80111
PWM_3 = (int)TIM3_BASE,
112+
#endif
113+
#if defined TIM4_BASE
81114
PWM_4 = (int)TIM4_BASE,
115+
#endif
116+
#if defined TIM5_BASE
82117
PWM_5 = (int)TIM5_BASE,
118+
#endif
119+
#if defined TIM8_BASE
83120
PWM_8 = (int)TIM8_BASE,
121+
#endif
122+
#if defined TIM9_BASE
84123
PWM_9 = (int)TIM9_BASE,
124+
#endif
125+
#if defined TIM10_BASE
85126
PWM_10 = (int)TIM10_BASE,
127+
#endif
128+
#if defined TIM11_BASE
86129
PWM_11 = (int)TIM11_BASE,
130+
#endif
131+
#if defined TIM12_BASE
87132
PWM_12 = (int)TIM12_BASE,
133+
#endif
134+
#if defined TIM13_BASE
88135
PWM_13 = (int)TIM13_BASE,
136+
#endif
137+
#if defined TIM14_BASE
89138
PWM_14 = (int)TIM14_BASE
139+
#endif
90140
} PWMName;
91141

142+
#if DEVICE_CAN
92143
typedef enum {
93144
CAN_1 = (int)CAN1_BASE,
94-
CAN_2 = (int)CAN2_BASE
145+
#if defined CAN2_BASE
146+
CAN_2 = (int)CAN2_BASE,
147+
#endif
148+
#if defined CAN3_BASE
149+
CAN_3 = (int)CAN3_BASE
150+
#endif
95151
} CANName;
152+
#endif
96153

154+
#if defined QSPI_R_BASE
97155
typedef enum {
98156
QSPI_1 = (int)QSPI_R_BASE,
99157
} QSPIName;
158+
#endif
100159

101160
typedef enum {
102161
USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
162+
#if defined USB_OTG_HS_PERIPH_BASE
103163
USB_HS = (int)USB_OTG_HS_PERIPH_BASE
164+
#endif
104165
} USBName;
105166

106167
#ifdef __cplusplus

‎targets/TARGET_STM/TARGET_STM32F4/STM32Cube_FW/CMSIS/CMakeLists.txt

Lines changed: 0 additions & 7 deletions
This file was deleted.

‎targets/TARGET_STM/TARGET_STM32F4/STM32Cube_FW/CMSIS/stm32f401xc.h

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2281,17 +2281,18 @@ typedef struct
22812281
/* */
22822282
/******************************************************************************/
22832283
/******************* Bits definition for FLASH_ACR register *****************/
2284-
#define FLASH_ACR_LATENCY_Pos (0U)
2285-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2286-
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2287-
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2288-
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2289-
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2290-
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2291-
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2292-
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2293-
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2294-
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2284+
#define FLASH_ACR_LATENCY_Pos (0U)
2285+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
2286+
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2287+
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2288+
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2289+
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2290+
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2291+
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2292+
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2293+
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2294+
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2295+
22952296

22962297
#define FLASH_ACR_PRFTEN_Pos (8U)
22972298
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
@@ -2538,7 +2539,7 @@ typedef struct
25382539
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
25392540
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
25402541
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2541-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2542+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
25422543
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
25432544
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
25442545
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2569,7 +2570,7 @@ typedef struct
25692570
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
25702571
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
25712572
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2572-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2573+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
25732574
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
25742575
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
25752576
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎targets/TARGET_STM/TARGET_STM32F4/STM32Cube_FW/CMSIS/stm32f401xe.h

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2281,17 +2281,18 @@ typedef struct
22812281
/* */
22822282
/******************************************************************************/
22832283
/******************* Bits definition for FLASH_ACR register *****************/
2284-
#define FLASH_ACR_LATENCY_Pos (0U)
2285-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2286-
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2287-
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2288-
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2289-
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2290-
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2291-
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2292-
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2293-
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2294-
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2284+
#define FLASH_ACR_LATENCY_Pos (0U)
2285+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
2286+
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2287+
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2288+
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2289+
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2290+
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2291+
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2292+
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2293+
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2294+
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2295+
22952296

22962297
#define FLASH_ACR_PRFTEN_Pos (8U)
22972298
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
@@ -2538,7 +2539,7 @@ typedef struct
25382539
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
25392540
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
25402541
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2541-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2542+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
25422543
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
25432544
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
25442545
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2569,7 +2570,7 @@ typedef struct
25692570
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
25702571
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
25712572
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2572-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2573+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
25732574
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
25742575
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
25752576
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

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