Merge pull request #7706 from jamesbeyond/fm_mem

 Refactoring memory regions definitions for Fast Models MPS2 targets

Author: Cruz Monrreal

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct

@@ -1,3 +1,4 @@
+#! armcc -E
 ;* MPS2 CMSIS Library
 ;*
 ;* Copyright (c) 2006-2018 ARM Limited
@@ -33,15 +34,31 @@
 ; *** Scatter-Loading Description File                      ***
 ; *************************************************************
 
-LR_IROM1 0x00000000 0x00400000  {    ; load region size_region
-  ER_IROM1 0x00000000 0x00400000  {  ; load address = execution address
+#include "../memory_zones.h"
+#include "../cmsis_nvic.h"
+
+#if (defined(__stack_size__))
+    #define STACK_SIZE  __stack_size__
+#else  
+    #define STACK_SIZE  0x0400
+#endif
+
+; The vector table is loaded at address 0x00000000 in Flash memory region.
+LR_IROM1 MAPPABLE_START MAPPABLE_SIZE  {
+  ER_IROM1 MAPPABLE_START MAPPABLE_SIZE  {
    *.o (RESET, +First)
+  }
+}
+
+LR_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE  {    ; load region size_region
+  ER_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE  {  ; load address = execution address
    *(InRoot$$Sections)
    .ANY (+RO)
   }
-  ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
-  RW_IRAM1 (0x20000000+0x100) (0x400000-0x100)  {  ; RW data
+  ; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
+  RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE)  {  ; RW data
    .ANY (+RW +ZI)
   }
+  ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down
+  }
 }
-

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/startup_MPS2.S

@@ -34,38 +34,14 @@
 ;           CMSDK_CM0 Device
 ;
 ;******************************************************************************
-;
-;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00004000
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
 
+#include "../memory_zones.h"
 
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00001000
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
+__initial_sp    EQU     ZBT_SRAM2_START + ZBT_SRAM2_SIZE
 
                 PRESERVE8
                 THUMB
 
-
 ; Vector Table Mapped to Address 0 at Reset
 
                 AREA    RESET, DATA, READONLY
@@ -115,14 +91,14 @@ __Vectors       DCD     __initial_sp              ; Top of Stack
                 DCD     UARTTX4_Handler           ; UART 4 TX Handler
                 DCD     ADCSPI_Handler            ; SHIELD ADC SPI exceptions Handler
                 DCD     SHIELDSPI_Handler         ; SHIELD SPI exceptions Handler
-                DCD     PORT0_0_Handler           ; GPIO Port 0 pin 0 Handler                                    
-                DCD     PORT0_1_Handler           ; GPIO Port 0 pin 1 Handler                                    
-                DCD     PORT0_2_Handler           ; GPIO Port 0 pin 2 Handler                                    
-                DCD     PORT0_3_Handler           ; GPIO Port 0 pin 3 Handler                                    
-                DCD     PORT0_4_Handler           ; GPIO Port 0 pin 4 Handler                                    
-                DCD     PORT0_5_Handler           ; GPIO Port 0 pin 5 Handler                                    
-                DCD     PORT0_6_Handler           ; GPIO Port 0 pin 6 Handler                                    
-                DCD     PORT0_7_Handler           ; GPIO Port 0 pin 7 Handler                                    
+                DCD     PORT0_0_Handler           ; GPIO Port 0 pin 0 Handler                                   
+                DCD     PORT0_1_Handler           ; GPIO Port 0 pin 1 Handler                                   
+                DCD     PORT0_2_Handler           ; GPIO Port 0 pin 2 Handler                                   
+                DCD     PORT0_3_Handler           ; GPIO Port 0 pin 3 Handler                                   
+                DCD     PORT0_4_Handler           ; GPIO Port 0 pin 4 Handler                                   
+                DCD     PORT0_5_Handler           ; GPIO Port 0 pin 5 Handler                                   
+                DCD     PORT0_6_Handler           ; GPIO Port 0 pin 6 Handler                                   
+                DCD     PORT0_7_Handler           ; GPIO Port 0 pin 7 Handler                                   
 __Vectors_End
 
 __Vectors_Size  EQU     __Vectors_End - __Vectors
@@ -217,54 +193,27 @@ UARTOVF_Handler
 ETHERNET_Handler
 I2S_Handler
 TSC_Handler
-PORT2_COMB_Handler       
-PORT3_COMB_Handler       
-UARTRX3_Handler          
-UARTTX3_Handler          
-UARTRX4_Handler          
-UARTTX4_Handler          
-ADCSPI_Handler           
-SHIELDSPI_Handler        
-PORT0_0_Handler                                   
-PORT0_1_Handler                                   
-PORT0_2_Handler                                   
-PORT0_3_Handler                                   
-PORT0_4_Handler                                   
-PORT0_5_Handler                                   
-PORT0_6_Handler                                   
-PORT0_7_Handler                                   
+PORT2_COMB_Handler      
+PORT3_COMB_Handler      
+UARTRX3_Handler         
+UARTTX3_Handler         
+UARTRX4_Handler         
+UARTTX4_Handler         
+ADCSPI_Handler          
+SHIELDSPI_Handler       
+PORT0_0_Handler                                  
+PORT0_1_Handler                                  
+PORT0_2_Handler                                  
+PORT0_3_Handler                                  
+PORT0_4_Handler                                  
+PORT0_5_Handler                                  
+PORT0_6_Handler                                  
+PORT0_7_Handler                                  
                 B       .
 
                 ENDP
 
 
                 ALIGN
 
-
-; User Initial Stack & Heap
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ALIGN
-
-                ENDIF
-
-
                 END

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld

@@ -27,11 +27,15 @@
 /* The length of the VECTORS region is a bit larger than
  * is necessary based on the number of exception handlers.
  */
+
+#include "../memory_zones.h"
+#include "../cmsis_nvic.h"
+
 MEMORY
 {
-  VECTORS (rx)          : ORIGIN = 0x00000000, LENGTH = 0x00000400
-  FLASH (rx)            : ORIGIN = 0x00000400, LENGTH = 0x00040000 - 0x00000400
-  RAM (rwx)             : ORIGIN = 0x20000000, LENGTH = 0x00020000
+  VECTORS (rx)          : ORIGIN = MAPPABLE_START, LENGTH = MAPPABLE_SIZE
+  FLASH (rx)            : ORIGIN = ZBT_SRAM1_START, LENGTH = ZBT_SRAM1_SIZE
+  RAM (rwx)             : ORIGIN = ZBT_SRAM2_START, LENGTH = ZBT_SRAM2_SIZE
 }
 
 /* Linker script to place sections and symbol values. Should be used together
@@ -62,11 +66,10 @@ MEMORY
  */
 ENTRY(Reset_Handler)
 
-HEAP_SIZE  = 0x4000;
-STACK_SIZE = 0x1000;
+STACK_SIZE = 0x400;
 
 /* Size of the vector table in SRAM */
-M_VECTOR_RAM_SIZE = 0x140;
+M_VECTOR_RAM_SIZE = 0x100;
 
 SECTIONS
 {
@@ -188,13 +191,13 @@ SECTIONS
 
     bss_size = __bss_end__ - __bss_start__;
 
-    .heap :
+    .heap (COPY):
     {
         . = ALIGN(8);
         __end__ = .;
         PROVIDE(end = .);
         __HeapBase = .;
-        . += HEAP_SIZE;
+        *(.heap*)
         __HeapLimit = .;
         __heap_limit = .; /* Add for _sbrk */
     } > RAM

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf

@@ -19,25 +19,37 @@
  * limitations under the License.
  */
 
-/* The RAM region doesn't start at the beginning of the RAM address
- * space to create space for the vector table copied over to the RAM by mbed.
- * The space left is a bit bigger than is necessary based on the number of
- * interrupt handlers.
+/*
+ * WARNING: these symbols are the same as the defines in ../memory_zones.h but
+ * can not be included here. Please make sure that the two definitions match.
  */
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/* Code memory zones */
+define symbol MAPPABLE_START   = 0x00000000;
+define symbol MAPPABLE_SIZE    = 0x00004000; /* 16 KiB */
+define symbol ZBT_SRAM1_START  = (0x00000000 + 0x00004000);
+define symbol ZBT_SRAM1_SIZE   = (0x00400000 - 0x00004000); /* 4 MiB - 16 KiB */
+
+/* Data memory zones */
+define symbol ZBT_SRAM2_START = 0x20000000;
+define symbol ZBT_SRAM2_SIZE  = 0x00400000; /* 4 MB */
+
+/* NVIC vector numbers and size. */
+define symbol NVIC_NUM_VECTORS        = (16 + 48);
+define symbol NVIC_VECTORS_SIZE       = (NVIC_NUM_VECTORS * 4);
+
 /*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x00000000;
+define symbol __ICFEDIT_intvec_start__ = MAPPABLE_START;
+
 /*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__    = 0x00000000;
-define symbol __ICFEDIT_region_ROM_end__      = 0x0003FFFF;
-define symbol __ICFEDIT_region_RAM_start__    = 0x20000140;
-define symbol __ICFEDIT_region_RAM_end__      = 0x2001FFFF;
+define symbol __ICFEDIT_region_ROM_start__    = ZBT_SRAM1_START;
+define symbol __ICFEDIT_region_ROM_end__      = ZBT_SRAM1_START + ZBT_SRAM1_SIZE - 1;
+define symbol __ICFEDIT_region_RAM_start__    = ZBT_SRAM2_START + NVIC_VECTORS_SIZE;
+define symbol __ICFEDIT_region_RAM_end__      = ZBT_SRAM2_START + ZBT_SRAM2_SIZE - 1;
+
 /*-Sizes-*/
 /* Heap and Stack size */
-define symbol __ICFEDIT_size_heap__   = 0x4000;
-define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x200000;
+define symbol __ICFEDIT_size_cstack__ = 0x400;
 /**** End of ICF editor section. ###ICF###*/
 
 define memory mem with size = 4G;

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/cmsis_nvic.c

@@ -28,27 +28,20 @@
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
-*******************************************************************************
-* CMSIS-style functionality to support dynamic vectors
 *******************************************************************************/
 
+
 #ifndef MBED_CMSIS_NVIC_H
 #define MBED_CMSIS_NVIC_H
 
-#include "cmsis.h"
-
-#define NVIC_NUM_VECTORS      (16 + 48)
-#define NVIC_USER_IRQ_OFFSET  16
+#include "memory_zones.h"
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+#define NVIC_NUM_VECTORS        (16 + 48)
+#define NVIC_RAM_VECTOR_ADDRESS ZBT_SRAM2_START    // Location of vectors in RAM
 
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
-uint32_t NVIC_GetVector(IRQn_Type IRQn);
-
-#ifdef __cplusplus
-}
-#endif
+/*
+ * Size of the whole vector table in bytes. Each vector is on 32 bits.
+ */
+#define NVIC_VECTORS_SIZE       (NVIC_NUM_VECTORS * 4)
 
 #endif

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/cmsis_nvic.h

@@ -32,19 +32,19 @@
 
 /*
  * Code memory zones
- * Please note that MPS2 on Fast Models do not simulate persistent flash memory.
- * The FLASH memory zone is a 256 KiB SRAM block and named FLASH
+ * Please note that MPS2 on Fast Models do not implemented persistent flash memory.
+ * The FLASH memory can be simulated via 4MB ZBT_SRAM1 block
  * only to keep the same name than in the CMSDK RTL and Fast Models Reference
  * Guide.
  */
-#define FLASH_START      0x00000000
-#define FLASH_SIZE       0x00040000 /* 256 KiB */
-#define ZBT_SRAM1_START  0x00400000
-#define ZBT_SRAM1_SIZE   0x00400000 /* 4 MiB */
+#define MAPPABLE_START   0x00000000
+#define MAPPABLE_SIZE    0x00004000  /* 16 KiB */
+#define ZBT_SRAM1_START  (0x00000000 + 0x00004000)
+#define ZBT_SRAM1_SIZE   (0x00400000 - 0x00004000) /* 4 MiB - 16 KiB*/
 
 /* Data memory zones */
 #define ZBT_SRAM2_START  0x20000000
-#define ZBT_SRAM2_SIZE   0x00800000 /* 8 MiB */
+#define ZBT_SRAM2_SIZE   0x00400000 /* 4 MiB */
 
 #endif /* MEMORY_ZONES_H */