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Updated hal & cmsis support for MTS Dragonfly and MTS mDot #1001

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Merged
merged 30 commits into from
Mar 27, 2015
Merged

Updated hal & cmsis support for MTS Dragonfly and MTS mDot #1001

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e5f05b8
[mbed][MTS_DRAGONFLY_F411RE] preliminary support for dragonfly bootlo…
mfiore02 Jan 12, 2015
952cc75
[mbed][MTS_DRAGONFLY_F411RE] update application offset to 64kB
mfiore02 Jan 12, 2015
d41ef07
add precompiled bootloaders for supported toolchains (based on commit…
mfiore02 Jan 13, 2015
88f9d7e
[mbed][MTS_DRAGONFLY_F411RE] added custom linker file for IAR toolchain
vinnierabbit Jan 14, 2015
eb3650b
[mbed][MTS_DRAGONFLY_F411RE] realized we only need one bootloader, no…
mfiore02 Jan 14, 2015
62121b7
[mbed][MTS_DRAGONFLY_F411RE] append MD5 checksum to combined binary f…
mfiore02 Jan 20, 2015
da7c5fb
[mbed][MTS_DRAGONFLY_F411RE] use CRC32 instead of MD5 for checksum of…
mfiore02 Feb 6, 2015
db72429
[mbed][MTS_DRAGONFLY_F411RE] update to latest bootloader with full fw…
mfiore02 Feb 6, 2015
3b896d6
[mbed][MTS_DRAGONFLY_F411RE] update bootloader to latest from git rev…
mfiore02 Feb 6, 2015
3876957
[mbed][MTS_MDOT_F411RE] update pin names
Feb 11, 2015
101141f
[mbed][MTS_MDOT_F411RE] change STDIO_UART to UART_1
Feb 12, 2015
90f6719
[mbed][MTS_MDOT_F411RE] preliminary bootloader+app support
Feb 13, 2015
bbe23be
[mbed][MTS_MDOT_F411RE] system_stm32f4xx.c: allow override of VECT_TA…
Feb 13, 2015
6bd25a1
[mbed][MTS_MDOT_F411RE] cmsis_nvic.c: fix NVIC_FLASH_VECTOR_ADDRESS w…
Feb 13, 2015
b1c4a63
[mbed][MTS_MDOT_F411RE] add debug bootloader.bin
Feb 13, 2015
506ead1
[mbed][MTS_DRAGONFLY_F411RE] add pin names for radio RTS/CTS and exte…
mfiore02 Feb 16, 2015
6b1bf31
[mbed][MTS_DRAGONFLY_F411RE] fix NVIC_FLASH_VECTOR_ADDRESS with custo…
mfiore02 Feb 16, 2015
2f56029
[mbed][MTS_DRAGONFLY_F411RE] correct vector table start address for I…
mfiore02 Feb 16, 2015
67f6603
[mbed][MTS_DRAGONFLY_F411RE] override default binary name with consta…
mfiore02 Feb 17, 2015
28fdf0b
[mbed][MTS_DRAGONFLY_F411RE] add post-build script invocation to IAR …
mfiore02 Feb 17, 2015
0d98831
[MTS_MDOT_F411RE] update with working bootloader.bin
Feb 17, 2015
0fc5e25
[mbed][MTS_DRAGONFLY_F411RE] update bootloader binary build to rev 70…
mfiore02 Feb 18, 2015
7e3aaa6
[mbed][MTS_DRAGONFLY_F411RE] add post-build to Debug build as well as…
mfiore02 Feb 18, 2015
52be48d
[mbed][MTS_DRAGONFLY_F411RE] remove post-build from Release build - R…
mfiore02 Feb 18, 2015
812d629
[mbed][MTS_DRAGONFLY_F411RE] add DCD, DTR, DSR, and RI pin names for …
mfiore02 Feb 25, 2015
d4740c5
[mbed][MTS_DRAGONFLY_F411RE] update PinNames.h to match rev B Dragonf…
mfiore02 Mar 2, 2015
a0ebff5
[mbed][MTS_DRAGONFLY_F411RE] update to revision fa5f8ebb7de6af4f06c6b…
mfiore02 Mar 6, 2015
b7e8c02
[mbed][MTS_DRAGONFLY_F411RE] update IAR linker file for Dragonfly, la…
mfiore02 Mar 6, 2015
2d65b89
[mbed][MTS_DRAGONFLY_F411RE] update stack and heap size for Dragonfly…
mfiore02 Mar 23, 2015
54f4391
[mbed][MTS_DRAGONFLY_F411RE][MTS_MDOT_F411RE] update bootloader to re…
mfiore02 Mar 23, 2015
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6 changes: 4 additions & 2 deletions ...TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM_MICRO/stm32f411re.sct
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Expand Up @@ -28,9 +28,11 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
LR_IROM1 0x08000000 0x80000 { ; load region size_region
; FIRST 64 KB FLASH FOR BOOTLOADER
; REST 448 KB FLASH FOR APPLICATION
LR_IROM1 0x08010000 0x70000 { ; load region size_region

ER_IROM1 0x08000000 0x80000 { ; load address = execution address
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
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6 changes: 4 additions & 2 deletions ...s/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM_STD/stm32f411re.sct
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Expand Up @@ -28,9 +28,11 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
LR_IROM1 0x08000000 0x80000 { ; load region size_region
; FIRST 64 KB FLASH FOR BOOTLOADER
; REST 448 KB FLASH FOR APPLICATION
LR_IROM1 0x08010000 0x70000 { ; load region size_region

ER_IROM1 0x08000000 0x80000 { ; load address = execution address
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
Expand Down
4 changes: 3 additions & 1 deletion .../TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld
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Expand Up @@ -3,7 +3,9 @@
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
/* First 64kB of flash reserved for bootloader */
/* Other 448kB for application */
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 448K
/* CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K */
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
}
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11 changes: 6 additions & 5 deletions ...cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf
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@@ -1,6 +1,6 @@
/* [ROM = 512kb = 0x80000] */
define symbol __intvec_start__ = 0x08000000;
define symbol __region_ROM_start__ = 0x08000000;
define symbol __intvec_start__ = 0x08010000;
define symbol __region_ROM_start__ = 0x08010000;
define symbol __region_ROM_end__ = 0x0807FFFF;

/* [RAM = 128kb = 0x20000] Vector table dynamic copy: 102 vectors = 408 bytes (0x198) to be reserved in RAM */
Expand All @@ -15,9 +15,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];

/* Stack and Heap */
/*Heap 1/4 of ram and stack 1/8*/
define symbol __size_cstack__ = 0x4000;
define symbol __size_heap__ = 0x8000;
/* Stack: 4kB - 408B for vector table */
/* Heap: 96kB */
define symbol __size_cstack__ = 0xe68;
define symbol __size_heap__ = 0x18000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
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2 changes: 1 addition & 1 deletion ...ies/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/cmsis_nvic.c
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Expand Up @@ -31,7 +31,7 @@
#include "cmsis_nvic.h"

#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
#define NVIC_FLASH_VECTOR_ADDRESS (FLASH_BASE | VECT_TAB_OFFSET) // Initial vector position in flash

void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
uint32_t *vectors = (uint32_t *)SCB->VTOR;
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2 changes: 2 additions & 0 deletions ...ed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c
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Expand Up @@ -124,8 +124,10 @@
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#ifndef VECT_TAB_OFFSET
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif
/******************************************************************************/

/**
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6 changes: 4 additions & 2 deletions ...msis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM_MICRO/stm32f411re.sct
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Expand Up @@ -28,9 +28,11 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
LR_IROM1 0x08000000 0x80000 { ; load region size_region
; FIRST 64 KB FLASH FOR BOOTLOADER
; REST 448 KB FLASH FOR APPLICATION
LR_IROM1 0x08010000 0x70000 { ; load region size_region

ER_IROM1 0x08000000 0x80000 { ; load address = execution address
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
Expand Down
6 changes: 4 additions & 2 deletions .../cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM_STD/stm32f411re.sct
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Expand Up @@ -28,9 +28,11 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
LR_IROM1 0x08000000 0x80000 { ; load region size_region
; FIRST 64 KB FLASH FOR BOOTLOADER
; REST 448 KB FLASH FOR APPLICATION
LR_IROM1 0x08010000 0x70000 { ; load region size_region

ER_IROM1 0x08000000 0x80000 { ; load address = execution address
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
Expand Down
6 changes: 4 additions & 2 deletions ...s/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld
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@@ -1,8 +1,10 @@
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
/* First 64kB of flash reserved for bootloader */
/* Other 448kB for application */
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 448K
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
}

/* Linker script to place sections and symbol values. Should be used together
Expand Down
2 changes: 1 addition & 1 deletion ...gets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf
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@@ -1,6 +1,6 @@
/* [ROM = 512kb = 0x80000] */
define symbol __intvec_start__ = 0x08000000;
define symbol __region_ROM_start__ = 0x08000000;
define symbol __region_ROM_start__ = 0x08010000;
define symbol __region_ROM_end__ = 0x0807FFFF;

/* [RAM = 128kb = 0x20000] Vector table dynamic copy: 102 vectors = 408 bytes (0x198) to be reserved in RAM */
Expand Down
2 changes: 1 addition & 1 deletion libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/cmsis_nvic.c
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Expand Up @@ -31,7 +31,7 @@
#include "cmsis_nvic.h"

#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
#define NVIC_FLASH_VECTOR_ADDRESS (FLASH_BASE | VECT_TAB_OFFSET) // Initial vector position in flash

void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
uint32_t *vectors = (uint32_t *)SCB->VTOR;
Expand Down
2 changes: 2 additions & 0 deletions ...es/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/system_stm32f4xx.c
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Expand Up @@ -125,8 +125,10 @@
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#ifndef VECT_TAB_OFFSET
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif
/******************************************************************************/

/**
Expand Down
21 changes: 16 additions & 5 deletions libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/PinNames.h
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Expand Up @@ -150,13 +150,24 @@ typedef enum {
LED2 = D3,
LED3 = D3,
LED4 = D3,
USER_BUTTON = PC_13,
SERIAL_TX = PB_6,
SERIAL_RX = PB_7,
USBTX = SERIAL_TX,
USBRX = SERIAL_RX,
SERIAL_TX = D1,
SERIAL_RX = D0,
SERIAL_RTS = A1,
SERIAL_CTS = A0,
SERIAL_DCD = D5,
SERIAL_DSR = D8,
SERIAL_DTR = D4,
SERIAL_RI = D9,
USBTX = PB_6,
USBRX = PB_7,
RADIO_TX = PC_7,
RADIO_RX = PC_6,
RADIO_RTS = PB_10,
RADIO_CTS = PB_12,
RADIO_DCD = D5,
RADIO_DSR = D8,
RADIO_DTR = D4,
RADIO_RI = D9,
I2C_SCL = D15,
I2C_SDA = D14,
SPI_MOSI = PC_12,
Expand Down
6 changes: 3 additions & 3 deletions ...aries/mbed/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/PeripheralNames.h
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Expand Up @@ -46,9 +46,9 @@ typedef enum {
UART_6 = (int)USART6_BASE
} UARTName;

#define STDIO_UART_TX PA_2
#define STDIO_UART_RX PA_3
#define STDIO_UART UART_2
#define STDIO_UART_TX PA_9
#define STDIO_UART_RX PA_10
#define STDIO_UART UART_1

typedef enum {
SPI_1 = (int)SPI1_BASE,
Expand Down
111 changes: 71 additions & 40 deletions libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/PinNames.h
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Expand Up @@ -122,48 +122,79 @@ typedef enum {
PH_1 = 0x71,

// Generic signals namings
DOUT = PA_2,
DIN = PA_3,
AD0 = PB_1,
AD1 = PB_0,
AD2 = PA_5,
AD3 = PA_4,
AD4 = PA_7,
AD5 = PC_1,
AD6 = PA_1,
DIO0 = PB_1,
DIO1 = PB_0,
DIO2 = PA_5,
DIO3 = PA_4,
DIO4 = PA_7,
DIO5 = PC_1,
DIO6 = PA_1,
DO8 = PA_6,
DI8 = PA_11,
PWM0 = PA_8,
PWM1 = PC_9,
NCTS = PA_0,
RTS = PA_1,
NDTR = PA_11,
RSSI = PA_8,
SLEEPRQ = PA_11,
ON_SLEEP = PA_12,
ASSOCIATE = PC_1,

LED1 = PA_2,
LED2 = PA_2,
LED3 = PA_2,
LED4 = PA_2,
SERIAL_TX = PA_9,
SERIAL_RX = PA_10,
USBTX = PA_2,
USBRX = PA_3,
XBEE_DOUT = PA_2,
XBEE_DIN = PA_3,
XBEE_AD0 = PB_1,
XBEE_AD1 = PB_0,
XBEE_AD2 = PA_5,
XBEE_AD3 = PA_4,
XBEE_AD4 = PA_7,
XBEE_AD5 = PC_1,
XBEE_AD6 = PA_1,
XBEE_DIO0 = PB_1,
XBEE_DIO1 = PB_0,
XBEE_DIO2 = PA_5,
XBEE_DIO3 = PA_4,
XBEE_DIO4 = PA_7,
XBEE_DIO5 = PC_1,
XBEE_DIO6 = PA_1,
XBEE_DO8 = PA_6,
XBEE_DI8 = PA_11,
XBEE_PWM0 = PA_8,
XBEE_PWM1 = PC_9,
XBEE_CTS = PA_0,
XBEE_RTS = PA_1,
XBEE_DTR = PA_11,
XBEE_RSSI = PA_8,
XBEE_SLEEPRQ = PA_11,
XBEE_ON_SLEEP = PC_13,
XBEE_ASSOCIATE = PC_1,
XBEE_USB_RES = PA_12,

// needed for mbed to build tests
LED1 = PA_0,

// XBEE_DOUT/DIN, RS232 port on UDK board
SERIAL_TX = PA_2,
SERIAL_RX = PA_3,

// DB_TX/RX, USB port on UDK board
DB_TX = PA_9,
DB_RX = PA_10,
USBTX = PA_9,
USBRX = PA_10,

// Multiplexed with XBEE pins
I2C_SCL = PA_8,
I2C_SDA = PC_9,
SPI_MOSI = PA_7,
SPI_MISO = PA_6,
SPI_SCK = PA_5,
SPI_CS = PA_4,
SPI1_MOSI = PA_7,
SPI1_MISO = PA_6,
SPI1_SCK = PA_5,
SPI1_CS = PA_4,

// SPI flash
SPI3_MOSI = PC_12,
SPI3_MISO = PC_11,
SPI3_SCK = PC_10,
SPI3_CS = PC_6,
FLASH_HOLD = PC_7,
FLASH_WP = PC_8,

// LoRa
LORA_RESET = PC_0,
LORA_RXCTL = PC_2,
LORA_TXCTL = PC_3,
LORA_DIO0 = PB_5,
LORA_DIO1 = PB_6,
LORA_DIO2 = PB_7,
LORA_DIO3 = PB_8,
LORA_DIO4 = PB_9,
LORA_DIO5 = PB_10,
// LoRa/SPI2
LORA_NSS = PB_12,
LORA_SCK = PB_13,
LORA_MISO = PB_14,
LORA_MOSI = PB_15,

// Not connected
NC = (int)0xFFFFFFFF
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Binary file added workspace_tools/bootloaders/MTS_DRAGONFLY_F411RE/bootloader.bin
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Binary file added workspace_tools/bootloaders/MTS_MDOT_F411RE/bootloader.bin
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8 changes: 4 additions & 4 deletions workspace_tools/export/iar_mts_dragonfly_f411re.ewp.tmpl
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Expand Up @@ -593,11 +593,11 @@
</option>
<option>
<name>OCOutputOverride</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>OOCOutputFile</name>
<state>{{name}}.bin</state>
<state>application.bin</state>
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Why {{name}} was changed to predefined appliation name?

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The predefined application name is referenced by the post-build script, which combines the bootloader and application binaries into a single image. I was unable to figure out how to reference {{name}} (or find out if it is stored as an IAR environment variable) from my post-build batch script.

</option>
<option>
<name>OOCCommandLineProducer</name>
Expand Down Expand Up @@ -627,7 +627,7 @@
<archiveVersion>1</archiveVersion>
<data>
<prebuild></prebuild>
<postbuild></postbuild>
<postbuild>"$PROJ_DIR$\post-build.bat" "$TARGET_DIR$"</postbuild>
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Shall this be removed?

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mike - was this script suppose to be added to the export directory?

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Our process for exporting to IAR isn't completely automated because there doesn't seem to be a mechanism to insert additional files into the zip that gets created by the exporter. We need to put in the post-build script, srec_cat application, and bootloader binary, so the IAR build with the current configuration succeeds.

</data>
</settings>
<settings>
Expand Down Expand Up @@ -711,7 +711,7 @@
</option>
<option>
<name>IlinkIcfOverride</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>IlinkIcfFile</name>
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1 change: 1 addition & 0 deletions workspace_tools/paths.py
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Expand Up @@ -28,6 +28,7 @@

TOOLS = join(ROOT, "workspace_tools")
TOOLS_DATA = join(TOOLS, "data")
TOOLS_BOOTLOADERS = join(TOOLS, "bootloaders")

# mbed libraries
MBED_BASE = join(LIB_DIR, "mbed")
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