STM32H7: refactor TARGET directory

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/us_ticker_data.h → targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/us_ticker_data.h

@@ -23,7 +23,7 @@
 #include "stm32h7xx.h"
 #include "stm32h7xx_ll_tim.h"
 #include "cmsis_nvic.h"
-   
+
 #define TIM_MST      TIM5
 #define TIM_MST_IRQ  TIM5_IRQn
 #define TIM_MST_RCC  __TIM5_CLK_ENABLE()

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/stm32h7xx.h → targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx.h

@@ -61,8 +61,7 @@
 #if !defined (STM32H743xx) && !defined (STM32H753xx)  && !defined (STM32H750xx) && !defined (STM32H742xx) && \
     !defined (STM32H745xx) && !defined (STM32H755xx)  && !defined (STM32H747xx) && !defined (STM32H757xx)
   /* #define STM32H742xx */   /*!< STM32H742VI, STM32H742ZI, STM32H742AI, STM32H742II, STM32H742BI, STM32H742XI Devices */
-  // MBED PATCH
-  #define STM32H743xx         /*!< STM32H743VI, STM32H743ZI, STM32H743AI, STM32H743II, STM32H743BI, STM32H743XI Devices */
+  /* #define STM32H743xx */   /*!< STM32H743VI, STM32H743ZI, STM32H743AI, STM32H743II, STM32H743BI, STM32H743XI Devices */
   /* #define STM32H753xx */   /*!< STM32H753VI, STM32H753ZI, STM32H753AI, STM32H753II, STM32H753BI, STM32H753XI Devices */
   /* #define STM32H750xx */   /*!< STM32H750V, STM32H750I, STM32H750X Devices */
   /* #define STM32H747xx */   /*!< STM32H747ZI, STM32H747AI, STM32H747II, STM32H747BI, STM32H747XI Devices */
@@ -85,11 +84,9 @@
    In this case, these drivers will not be included and the application code will
    be based on direct access to peripherals registers
    */
-#define USE_HAL_DRIVER // MBED PATCH
+  /*#define USE_HAL_DRIVER */
 #endif /* USE_HAL_DRIVER */
 
-#define USE_FULL_LL_DRIVER // MBED PATCH
-
 /**
   * @brief CMSIS Device version number V1.5.0
   */

targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_rtc.h

@@ -27,7 +27,6 @@
 
 /* Includes ------------------------------------------------------------------*/
 #include "stm32h7xx_hal_def.h"
-#include "stm32h7xx_ll_rtc.h" // MBED PATCH
 
 /** @addtogroup STM32H7xx_HAL_Driver
   * @{

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/system_stm32h7xx.h → targets/TARGET_STM/TARGET_STM32H7/device/system_stm32h7xx.h

@@ -85,7 +85,6 @@ extern const  uint8_t D1CorePrescTable[16] ; /*!< D1CorePrescTable prescalers ta
 
 extern void SystemInit(void);
 extern void SystemCoreClockUpdate(void);
-extern void SetSysClock(void); // MBED PATCH
 /**
   * @}
   */

targets/TARGET_STM/TARGET_STM32H7/common_objects.h → targets/TARGET_STM/TARGET_STM32H7/objects.h

@@ -27,19 +27,39 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *******************************************************************************
  */
-#ifndef MBED_COMMON_OBJECTS_H
-#define MBED_COMMON_OBJECTS_H
+#ifndef MBED_OBJECTS_H
+#define MBED_OBJECTS_H
 
 #include "cmsis.h"
 #include "PortNames.h"
 #include "PeripheralNames.h"
 #include "PinNames.h"
 #include "stm32h7xx_ll_usart.h"
+#include "stm32h7xx_ll_rtc.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+struct gpio_irq_s {
+    IRQn_Type irq_n;
+    uint32_t irq_index;
+    uint32_t event;
+    PinName pin;
+};
+
+struct port_s {
+    PortName port;
+    uint32_t mask;
+    PinDirection direction;
+    __IO uint32_t *reg_in;
+    __IO uint32_t *reg_out;
+};
+
+struct trng_s {
+    RNG_HandleTypeDef handle;
+};
+
 struct pwmout_s {
     PWMName pwm;
     PinName pin;
@@ -154,4 +174,3 @@ struct can_s {
 #endif
 
 #endif
-

targets/TARGET_STM/mbed_rtx.h

@@ -95,8 +95,8 @@
        defined(TARGET_STM32F446RE) ||\
        defined(TARGET_STM32F446VE) ||\
        defined(TARGET_STM32F446ZE) ||\
-       defined(TARGET_STM32H743ZI) ||\
-       defined(TARGET_STM32H753ZI))
+       defined(TARGET_STM32H743xI) ||\
+       defined(TARGET_STM32H753xI))
 #define INITIAL_SP              (0x20020000UL)
 
 #elif (defined(TARGET_STM32F429ZI) ||\

targets/targets.json

@@ -1853,7 +1853,11 @@
         "public": false,
         "extra_labels": ["STM"],
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
-        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
+        "macros": [
+            "USE_HAL_DRIVER",
+            "USE_FULL_LL_DRIVER",
+            "TRANSACTION_QUEUE_SIZE_SPI=2"
+        ],
         "config": {
             "lse_available": {
                 "help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used",
@@ -3170,9 +3174,7 @@
         "core": "Cortex-M7FD",
         "extra_labels_add": [
             "STM32H7",
-            "STM32H743",
-            "STM32H743xI",
-            "STM32H743ZI"
+            "STM32H743xI"
         ],
         "config": {
             "d11_configuration": {
@@ -3196,8 +3198,8 @@
             }
         },
         "macros_add": [
-            "MBED_TICKLESS",
-            "USE_FULL_LL_DRIVER"
+            "STM32H743xx",
+            "MBED_TICKLESS"
         ],
         "overrides": { "lpticker_delay_ticks": 4 },
         "supported_form_factors": ["ARDUINO"],