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IAR: Enable linker optimizations for develop/release profile #11865
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@maciejbocianski, thank you for your changes. |
This isn't really the same link-time optimisation as we're talking about for GCC, so the "when to enable" reasoning is different.
If there was a "safe" version of merge_duplicate_sections, I'd be happier (see the reference to Can you show how much each option is saving in your build? |
@kjbracey-arm
Unfortunately most of the savings gives You are right, this option can be harmful in some situations. Description below
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I wouldn't totally rule out the merge option. I think the failure chances are slim, and the saving is significant. I'd certainly be inclined to try it at a pinch. If I was trying to fit my application into a teeny device, I'd try it, and not as the last resort. But I don't think it's something we can unilaterally decide to enable in the toolchain for all applications. This could break application code. And I know I've written code that could be broken by it. For example, in Nanostack I've done
Ah, here it is: mbed-os/features/nanostack/sal-stack-nanostack/source/Common_Protocols/mld.c Lines 152 to 162 in 2e96145
If the compiler or linker decided to merge that 16-byte zero array with some other handy zeroes, that test no longer works. |
I managed to reproduce this behavior, but had to put each variables in separate translation unit to get it finally merged into single memory location by linker |
Ah interesting find with that link. And doubly interesting that it's another network stack :) I guess network stacks are one of the most complicated things you run on an embedded system - or at least most prone to clever trickery. So if lwIP is known to fail, I think that totally rules out having it on by default. It is the sort of thing we might mention as a possibilty in a hypothetical "memory saving techniques" doc. With a "not with Nanostack or lwIP" and "don't blame us" proviso. |
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updated
Final savings is about 200B of flash REL +"--inline" DEV +"--inline" |
Yep, this is fine - just need to update the GitHub description. (And get rid of the plurals in the Git commit - it's just the inline optimisation). |
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@kjbracey-arm |
Documentation is clear that it's the default - I'm not convinced that it's worth copying the IDE. (And if you were, it should surely be a general policy for all options?) That could be some hold-over legacy from an older compiler version where vfe wasn't the default. |
- add --inline option to linker flags Some routines are so small that they can fit in the space of the instruction that calls the routine. Use this option to make the linker replace the call of a routine with the body of the routine, where applicable.
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@kjbracey-arm Updated - only |
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👍 Too bad no more savings can be achieved safely.
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Change is fine, but GitHub description should match final outcome.
PR description updated |
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Ci started |
Set to 5.15 as agreed |
Test run: FAILEDSummary: 1 of 11 test jobs failed Failed test jobs:
|
Description
Enabled linker optimizations in
IAR
toolchain for the release/develop profile.See also #11856
IAR doesn't provide single link-time optimization flag (like
--flto
in gcc).Instead IAR offers bunch of linker options:
Test results:
Test results for
IAR ANSI C/C++ Compiler V8.32.1.169/W32 for ARM
and release profileTested on mbed-cloud-client-example
Added
--vfe
--inline
--merge_duplicate_sections
options to IAR linkerCompilation time is almost the same
Summary of change (What the change is for and why)
Added
--vfe
--inline
--merge_duplicate_sections
options to IAR linkerDocumentation (Details of any document updates required)
Pull request type (required)
Test results (required)
Reviewers (optional)
@jamesbeyond @kjbracey-arm @fkjagodzinski
Release Notes (required for feature/major PRs)
Summary of changes
Impact of changes
Migration actions required