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Update MXRT1050 to SDK 6.0 #12095

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Jan 3, 2020
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Original file line number Diff line number Diff line change
Expand Up @@ -215,7 +215,7 @@ void kinetis_init_eth_hardware(void)
/* pull up the ENET_INT before RESET. */
GPIO_WritePinOutput(GPIO1, 10, 1);
GPIO_WritePinOutput(GPIO1, 9, 0);
wait_ms(1);
wait_us(1 * 1000);
GPIO_WritePinOutput(GPIO1, 9, 1);
}

Expand Down
27 changes: 17 additions & 10 deletions targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/gpio_irq_api.c
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,8 @@ static gpio_irq_handler irq_handler;
static GPIO_Type * const gpio_addrs[] = GPIO_BASE_PTRS;

/* Array of PORT IRQ number. */
static const IRQn_Type gpio_irqs[] = GPIO_COMBINED_IRQS;
static const IRQn_Type gpio_low_irqs[] = GPIO_COMBINED_LOW_IRQS;
static const IRQn_Type gpio_high_irqs[] = GPIO_COMBINED_HIGH_IRQS;

static void handle_interrupt_in(PortName port, int ch_base)
{
Expand Down Expand Up @@ -117,8 +118,6 @@ void gpio5_irq(void)

int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
{
uint32_t int_index;

if (pin == NC) {
return -1;
}
Expand Down Expand Up @@ -156,14 +155,14 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
break;
}

int_index = 2 * obj->port;
if (obj->pin > 15) {
int_index -= 1;
NVIC_SetVector(gpio_high_irqs[obj->port], vector);
NVIC_EnableIRQ(gpio_high_irqs[obj->port]);
} else {
NVIC_SetVector(gpio_low_irqs[obj->port], vector);
NVIC_EnableIRQ(gpio_low_irqs[obj->port]);
}

NVIC_SetVector(gpio_irqs[int_index], vector);
NVIC_EnableIRQ(gpio_irqs[int_index]);

obj->ch = ch_base + obj->pin;
channel_ids[obj->ch] = id;

Expand Down Expand Up @@ -243,12 +242,20 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)

void gpio_irq_enable(gpio_irq_t *obj)
{
NVIC_EnableIRQ(gpio_irqs[obj->port]);
if (obj->pin > 15) {
NVIC_EnableIRQ(gpio_high_irqs[obj->port]);
} else {
NVIC_EnableIRQ(gpio_low_irqs[obj->port]);
}
}

void gpio_irq_disable(gpio_irq_t *obj)
{
NVIC_DisableIRQ(gpio_irqs[obj->port]);
if (obj->pin > 15) {
NVIC_DisableIRQ(gpio_high_irqs[obj->port]);
} else {
NVIC_DisableIRQ(gpio_low_irqs[obj->port]);
}
}

#endif
Original file line number Diff line number Diff line change
Expand Up @@ -52,6 +52,7 @@ void lp_ticker_init(void)
gptConfig.clockSource = kGPT_ClockSource_LowFreq;
gptConfig.enableFreeRun = true;
gptConfig.enableMode = false;
gptConfig.enableRunInDoze = true;

GPT_Init(GPT2, &gptConfig);
GPT_EnableInterrupts(GPT2, kGPT_OutputCompare1InterruptEnable);
Expand Down Expand Up @@ -114,7 +115,8 @@ void lp_ticker_clear_interrupt(void)

void lp_ticker_free(void)
{

GPT_DisableInterrupts(GPT2, kGPT_OutputCompare1InterruptEnable);
NVIC_DisableIRQ(GPT2_IRQn);
}

#endif /* DEVICE_LPTICKER */
22 changes: 12 additions & 10 deletions targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/serial_api.c
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,8 @@
#include "PeripheralPins.h"
#include "fsl_clock_config.h"

static uint32_t serial_irq_ids[FSL_FEATURE_SOC_LPUART_COUNT] = {0};
/* LPUART starts from index 1 */
static uint32_t serial_irq_ids[FSL_FEATURE_SOC_LPUART_COUNT + 1] = {0};
static uart_irq_handler irq_handler;
/* Array of UART peripheral base address. */
static LPUART_Type *const uart_addrs[] = LPUART_BASE_PTRS;
Expand Down Expand Up @@ -320,28 +321,28 @@ static int serial_is_enabled(uint32_t uart_index)
{
int clock_enabled = 0;
switch (uart_index) {
case 0:
case 1:
clock_enabled = (CCM->CCGR5 & CCM_CCGR5_CG12_MASK) >> CCM_CCGR5_CG12_SHIFT;
break;
case 1:
case 2:
clock_enabled = (CCM->CCGR0 & CCM_CCGR0_CG14_MASK) >> CCM_CCGR0_CG14_SHIFT;
break;
case 2:
case 3:
clock_enabled = (CCM->CCGR0 & CCM_CCGR0_CG6_MASK) >> CCM_CCGR0_CG6_SHIFT;
break;
case 3:
case 4:
clock_enabled = (CCM->CCGR1 & CCM_CCGR1_CG12_MASK) >> CCM_CCGR1_CG12_SHIFT;
break;
case 4:
case 5:
clock_enabled = (CCM->CCGR3 & CCM_CCGR3_CG1_MASK) >> CCM_CCGR3_CG1_SHIFT;
break;
case 5:
case 6:
clock_enabled = (CCM->CCGR3 & CCM_CCGR3_CG3_MASK) >> CCM_CCGR3_CG3_SHIFT;
break;
case 6:
case 7:
clock_enabled = (CCM->CCGR5 & CCM_CCGR5_CG13_MASK) >> CCM_CCGR5_CG13_SHIFT;
break;
case 7:
case 8:
clock_enabled = (CCM->CCGR6 & CCM_CCGR6_CG7_MASK) >> CCM_CCGR6_CG7_SHIFT;
break;
default:
Expand All @@ -357,7 +358,8 @@ bool serial_check_tx_ongoing()
int i;
bool uart_tx_ongoing = false;

for (i = 0; i < FSL_FEATURE_SOC_LPUART_COUNT; i++) {
/* The first LPUART instance number is 1 */
for (i = 1; i <= FSL_FEATURE_SOC_LPUART_COUNT; i++) {
/* First check if UART is enabled */
if (!serial_is_enabled(i)) {
/* UART is not enabled, check the next instance */
Expand Down
4 changes: 0 additions & 4 deletions targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/sleep.c
Original file line number Diff line number Diff line change
Expand Up @@ -23,13 +23,9 @@ extern bool serial_check_tx_ongoing();

void hal_sleep(void)
{
vPortPRE_SLEEP_PROCESSING(kCLOCK_ModeWait);

__DSB();
__WFI();
__ISB();

vPortPOST_SLEEP_PROCESSING(kCLOCK_ModeWait);
}

void hal_deepsleep(void)
Expand Down
10 changes: 5 additions & 5 deletions targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/us_ticker.c
Original file line number Diff line number Diff line change
Expand Up @@ -50,18 +50,18 @@ void us_ticker_init(void)
{
/* Common for ticker/timer. */
uint32_t busClock;
/* Structure to initialize PIT. */
pit_config_t pitConfig;

us_ticker_setup_clock();

PIT_GetDefaultConfig(&pitConfig);
PIT_Init(PIT, &pitConfig);

busClock = us_ticker_get_clock();

/* Let the timer to count if re-init. */
if (!us_ticker_inited) {
/* Structure to initialize PIT. */
pit_config_t pitConfig;

PIT_GetDefaultConfig(&pitConfig);
PIT_Init(PIT, &pitConfig);

PIT_SetTimerPeriod(PIT, kPIT_Chnl_0, busClock / 1000000 - 1);
PIT_SetTimerPeriod(PIT, kPIT_Chnl_1, 0xFFFFFFFF);
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -205,7 +205,7 @@ typedef enum {

I2C_SCL = A5,
I2C_SDA = A4,

// Not connected
NC = (int)0xFFFFFFFF
} PinName;
Expand Down
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