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Merged
merged 13 commits into from
Jan 7, 2020
Merged

Nuvoton: Support usbd #12176

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b34fd30
M487: Support USBD
cyliangtw Sep 23, 2019
84882f7
M487: Fixed USBD serial input pending issue
cyliangtw Nov 8, 2019
dc55d74
Adjust _rx_in_progress=true in USBCDC.cpp for USB DMA auto-receive chip
cyliangtw Nov 18, 2019
9b721bf
Support M487 USBD 1.1 & 2.0
cyliangtw Nov 18, 2019
93fbef2
Refine M487 USBD code and build M263A successfully
cyliangtw Nov 18, 2019
a5aaabf
NANO130 add extern C into nano100_usbd.h for C++ caller
cyliangtw Nov 20, 2019
abf3eee
Support NuMaker M453, NUC472, M2351 & M263 USBD; also support M0 usb-…
cyliangtw Nov 20, 2019
6612ee8
Set NANO130 CLK as 48 MHz for USBD support
cyliangtw Nov 20, 2019
4cddc5d
Add M453 USBD
cyliangtw Dec 26, 2019
eab8555
Support NUC472 with USB 2.0 only and set M487 USB1.1 in default
cyliangtw Dec 31, 2019
115520a
Add SPDX identifiers in Nuvoton USBD files
cyliangtw Jan 3, 2020
95be7da
Add CLKSEL0_USBSEL_HIRC48 in m2351_clk.h
cyliangtw Jan 6, 2020
2764f48
NANO130 SRAM 16KB can't afford usb-msd test, to skip this test
cyliangtw Jan 6, 2020
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4 changes: 2 additions & 2 deletions TESTS/usb_device/msd/main.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -33,8 +33,8 @@
#include "HeapBlockDevice.h"
#include "FATFileSystem.h"


#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE
// TARGET_NANO100 SRAM 16KB can't afford mass-storage-disk test, so skip usb_msd_test.
#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE || TARGET_NANO100
#error [NOT_SUPPORTED] USB Device not supported for this target
#else

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2 changes: 1 addition & 1 deletion drivers/source/usb/USBCDC.cpp
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Expand Up @@ -464,8 +464,8 @@ void USBCDC::_receive_isr_start()
{
if ((_rx_size == 0) && !_rx_in_progress) {
// Refill the buffer
read_start(_bulk_out, _rx_buffer, sizeof(_rx_buffer));
_rx_in_progress = true;
read_start(_bulk_out, _rx_buffer, sizeof(_rx_buffer));
}
}

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1 change: 1 addition & 0 deletions targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_clk.h
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Expand Up @@ -64,6 +64,7 @@ extern "C"
#define CLK_CLKSEL0_SDH0SEL_HCLK (0x02UL<<CLK_CLKSEL0_SDH0SEL_Pos) /*!< Setting SDH0 clock source as HCLK */
#define CLK_CLKSEL0_SDH0SEL_HIRC (0x03UL<<CLK_CLKSEL0_SDH0SEL_Pos) /*!< Setting SDH0 clock source as HIRC */

#define CLK_CLKSEL0_USBSEL_HIRC48 (0x00UL<<CLK_CLKSEL0_USBSEL_Pos) /*!< Setting USB clock source as HIRC48 */
#define CLK_CLKSEL0_USBSEL_PLL (0x01UL<<CLK_CLKSEL0_USBSEL_Pos) /*!< Setting USB clock source as PLL */


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8 changes: 7 additions & 1 deletion targets/TARGET_NUVOTON/TARGET_NANO100/device/StdDriver/nano100_usbd.h
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Expand Up @@ -9,7 +9,10 @@
******************************************************************************/
#ifndef __USBD_H__
#define __USBD_H__

#ifdef __cplusplus
extern "C"
{
#endif

/** @addtogroup NANO100_Device_Driver NANO100 Device Driver
@{
Expand Down Expand Up @@ -501,6 +504,9 @@ void USBD_LockEpStall(uint32_t u32EpBitmap);

/*@}*/ /* end of group NANO100_Device_Driver */

#ifdef __cplusplus
}
#endif

#endif //__USBD_H__

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6 changes: 3 additions & 3 deletions targets/TARGET_NUVOTON/TARGET_NANO100/mbed_overrides.c
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Expand Up @@ -64,7 +64,7 @@ void mbed_sdk_init(void)
* T2. <1 ms with HIRC-clocked PLL as HCLK clock source
* T1 will fail Greentea test which requires max 10 ms wake-up time.
*
* If we just call CLK_SetCoreClock(FREQ_42MHZ) to configure HCLK to 42 MHz,
* If we just call CLK_SetCoreClock(FREQ_48MHZ) to configure HCLK to 48 MHz,
* it will go T1 with HXT already enabled in front. So we manually configure
* it to choose HXT/HIRC-clocked PLL.
*/
Expand All @@ -76,10 +76,10 @@ void mbed_sdk_init(void)
#endif

#if (NU_CLOCK_PLL == NU_HXT_PLL)
CLK_EnablePLL(CLK_PLLCTL_PLL_SRC_HXT, FREQ_42MHZ*2);
CLK_EnablePLL(CLK_PLLCTL_PLL_SRC_HXT, FREQ_48MHZ*2);
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_PLL, CLK_HCLK_CLK_DIVIDER(2));
#elif (NU_CLOCK_PLL == NU_HIRC_PLL)
CLK_EnablePLL(CLK_PLLCTL_PLL_SRC_HIRC, FREQ_42MHZ*2);
CLK_EnablePLL(CLK_PLLCTL_PLL_SRC_HIRC, FREQ_48MHZ*2);
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_PLL, CLK_HCLK_CLK_DIVIDER(2));
#endif

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