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Merged
merged 2 commits into from
Feb 3, 2020
Merged

M2351: Support IAR #12353

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152f6f1
M2351: Refine MBED_TZ_DEFAULT_ACCESS placement
ccli8 Jan 20, 2020
94762d0
M2351: Support IAR
ccli8 Jan 13, 2020
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10 changes: 5 additions & 5 deletions targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_IAR/M2351.icf
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */

include "../../../device/partition_M2351_mem.icf";
include "../../../device/partition_M2351_mem.icf.h";

if (! isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}

Expand All @@ -36,6 +36,7 @@ define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_

/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_intvec__ = 4 * (16 + 102);
define symbol __ICFEDIT_size_heap__ = 0x400;

/**** End of ICF editor section. ###ICF###*/
Expand All @@ -45,18 +46,17 @@ define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];

define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 102) { };
define block IRAMVEC with alignment = 1024, size = __ICFEDIT_size_intvec__ { };


initialize by copy { readwrite };
do not initialize { section .noinit };

place at address mem: __ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place at address mem: NU_TZ_NSC_START { block Image$$ER_IROM_NSC }

place at start of IRAM_region { block CSTACK };
place in IRAM_region { block IRAMVEC };
Expand Down
70 changes: 60 additions & 10 deletions targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_IAR/M2351.icf
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */

include "../../../device/partition_M2351_mem.icf";
include "../../../device/partition_M2351_mem.icf.h";

if (! isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}

Expand All @@ -38,6 +38,10 @@ define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_

/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
if (TFM_LVL > 0) {
define symbol __ICFEDIT_size_cstack_msp__ = 0x800;
}
define symbol __ICFEDIT_size_intvec__ = 4 * (16 + 102);
define symbol __ICFEDIT_size_heap__ = 0x400;


Expand All @@ -48,26 +52,72 @@ define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];

define block Image$$ER_IROM_NSC with alignment = 32 { readonly section Veneer$$CMSE };
/* IAR has something wrong with "$$" in section/block name. So unlike other toolchains,
* we name "ER_IROM_NSC" instead of "Image$$ER_IROM_NSC". */
define block ER_IROM_NSC with alignment = 32 { readonly section Veneer$$CMSE };

define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
if (TFM_LVL > 0) {
define block CSTACK_MSP with alignment = 8, size = __ICFEDIT_size_cstack_msp__ { };
}
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 102) { };

define block IRAMVEC with alignment = 1024, size = __ICFEDIT_size_intvec__ { };

if (TFM_LVL == 1) {
define block TDB_INTERNAL_STORAGE with size = NU_TDB_INTERNAL_STORAGE_SIZE{ };
define block TFM_SECURE_STACK with alignment = 128, size = 0x1000 { };
define block TFM_UNPRIV_SCRATCH with alignment = 32, size = 0x400 { };
define block ER_TFM_DATA with alignment = 8 { readwrite };
} else if (TFM_LVL > 1) {
error "TFM level 2/3 are not supported yet";
}

initialize by copy { readwrite };
do not initialize { section .noinit };

place at address mem: __ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place at address mem: NU_TZ_NSC_START { block Image$$ER_IROM_NSC }
place at address mem: NU_TZ_NSC_START { block ER_IROM_NSC };

place at start of IRAM_region { block CSTACK };
if (TFM_LVL == 0) {
place at start of IRAM_region { block CSTACK };
} else {
place at start of IRAM_region { block CSTACK_MSP };
place in IRAM_region { block CSTACK };
}
place in IRAM_region { block IRAMVEC };
place in IRAM_region { readwrite };

if (TFM_LVL == 0) {
place in IRAM_region { readwrite };
} else if (TFM_LVL == 1) {
place at address mem: NU_TDB_INTERNAL_STORAGE_START { block TDB_INTERNAL_STORAGE };
place in IRAM_region { block TFM_SECURE_STACK };
place in IRAM_region { block TFM_UNPRIV_SCRATCH };
place in IRAM_region { block ER_TFM_DATA };
} else {
error "TFM level 2/3 are not supported yet";
}

place in IRAM_region { block HEAP };

define exported symbol Image$$ER_IROM_NSC$$Base = NU_TZ_NSC_START;

/* TODO: Export the following symbols to support TFM secure code */
/*
if (TFM_LVL > 0) {
/* TODO: Check if TDB internal storage area overlaps with application ROM code */
define exported symbol Image$$ARM_LIB_STACK$$ZI$$Limit = Start of CSTACK;
}
if (TFM_LVL == 1) {
define exported symbol Image$$TFM_SECURE_STACK$$ZI$$Base = Start of TFM_SECURE_STACK;
define exported symbol Image$$TFM_SECURE_STACK$$ZI$$Limit = End of TFM_SECURE_STACK;
define exported symbol Image$$TFM_UNPRIV_SCRATCH$$ZI$$Base = Start of TFM_UNPRIV_SCRATCH;
define exported symbol Image$$TFM_UNPRIV_SCRATCH$$ZI$$Limit = End of TFM_UNPRIV_SCRATCH;
define exported symbol Image$$ER_TFM_DATA$$RW$$Base = Start of ER_TFM_DATA (readwrite - zeroinit);
define exported symbol Image$$ER_TFM_DATA$$RW$$Limit = End of ER_TFM_DATA (zeroinit);
define exported symbol Image$$ER_TFM_DATA$$ZI$$Base = End of ER_TFM_DATA (zeroinit);
define exported symbol Image$$ER_TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS);
define exported symbol Image$$ARM_LIB_HEAP$$ZI$$Base = Start of HEAP;
define exported symbol Image$$ARM_LIB_HEAP$$ZI$$Limit = End of HEAP;
}
*/
10 changes: 8 additions & 2 deletions targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.h
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Original file line number Diff line number Diff line change
Expand Up @@ -19,12 +19,18 @@
#ifndef __PARTITION_M2351_MEM_H__
#define __PARTITION_M2351_MEM_H__

/* About partition_M2351_mem.h/partition_M2351_mem.icf
/* About partition_M2351_mem.h/partition_M2351_mem.icf.h
*
* 1. partition_M2351_mem.h is created for centralizing memory partition configuration. It will be
* included by C/C++ files and linker files (except IAR linker file).
* 2. IAR linker doesn't support preprocessor, so partition_M2351_mem.icf, duplicate of partition_M2351_mem.h
* 2. IAR linker doesn't support preprocessor, so partition_M2351_mem.icf.h, duplicate of partition_M2351_mem.h
* is created for IAR linker file.
* 3. To continue above, we name partition_M2351_mem.icf.h instead of partition_M2351_mem.icf because:
* (1) Mbed OS build tool may mis-regard partition_M2351_mem.icf as the main linker configuration file.
* (2) *.icf files may not be present in search directories for "include" directive. Per observation,
* the search directories are inconsistent among normal example build and test code build. To address
* it, we name partition_M2351_mem.icf.h instead because *.h files are always present in these builds
* (already there or via copy).
*/

/* Default flash/SRAM partition
Expand Down
180 changes: 0 additions & 180 deletions targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.icf
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