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[mbed-os-5.15] Nanostack release to mbed-os-5.15 branch #12813

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Merged
merged 6 commits into from
Apr 22, 2020
Merged

[mbed-os-5.15] Nanostack release to mbed-os-5.15 branch #12813

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4daaaf1
Squashed 'features/nanostack/coap-service/' changes from e5e0c138e6..…
Apr 16, 2020
9f3c053
Merge commit '4daaaf126d9dfbfcbe638753573139d95442da1f' into mbed-os-…
Apr 16, 2020
d104328
Squashed 'features/nanostack/sal-stack-nanostack/' changes from fb741…
Apr 16, 2020
bbf2db3
Merge commit 'd104328f556c60ee09bb316ffc700ba8f1deca19' into mbed-os-…
Apr 16, 2020
9f2cd03
Update S2LP 802.15.4 RF driver
Apr 3, 2020
cc13a5b
Update Atmel 802.15.4 RF driver
Apr 3, 2020
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46 changes: 46 additions & 0 deletions components/802.15.4_RF/atmel-rf-driver/atmel-rf-driver/NanostackRfPhyAtmel.h
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Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,9 @@

#include "NanostackRfPhy.h"

// Uncomment to use testing gpios attached to TX/RX processes
// #define TEST_GPIOS_ENABLED

// Arduino pin defaults for convenience
#if !defined(ATMEL_SPI_MOSI)
#define ATMEL_SPI_MOSI D11
Expand Down Expand Up @@ -52,8 +55,24 @@
#if !defined(ATMEL_I2C_SCL)
#define ATMEL_I2C_SCL D15
#endif
#if !defined(TEST_PIN_TX)
#define TEST_PIN_TX D6
#endif
#if !defined(TEST_PIN_RX)
#define TEST_PIN_RX D3
#endif
#if !defined(TEST_PIN_CSMA)
#define TEST_PIN_CSMA D4
#endif
#if !defined(TEST_PIN_SPARE_1)
#define TEST_PIN_SPARE_1 D2
#endif
#if !defined(TEST_PIN_SPARE_2)
#define TEST_PIN_SPARE_2 D8
#endif

class RFBits;
class TestPins;

class NanostackRfPhyAtmel : public NanostackRfPhy {
public:
Expand All @@ -70,6 +89,7 @@ class NanostackRfPhyAtmel : public NanostackRfPhy {
AT24Mac _mac;
uint8_t _mac_addr[8];
RFBits *_rf;
TestPins *_test_pins;
bool _mac_set;

const PinName _spi_mosi;
Expand All @@ -81,5 +101,31 @@ class NanostackRfPhyAtmel : public NanostackRfPhy {
const PinName _spi_irq;
};

#ifdef TEST_GPIOS_ENABLED
#define TEST_TX_STARTED test_pins->TEST1 = 1;
#define TEST_TX_DONE test_pins->TEST1 = 0;
#define TEST_RX_STARTED test_pins->TEST2 = 1;
#define TEST_RX_DONE test_pins->TEST2 = 0;
#define TEST_CSMA_STARTED test_pins->TEST3 = 1;
#define TEST_CSMA_DONE test_pins->TEST3 = 0;
#define TEST_SPARE_1_ON test_pins->TEST4 = 1;
#define TEST_SPARE_1_OFF test_pins->TEST4 = 0;
#define TEST_SPARE_2_ON test_pins->TEST5 = 1;
#define TEST_SPARE_2_OFF test_pins->TEST5 = 0;
extern void (*fhss_uc_switch)(void);
extern void (*fhss_bc_switch)(void);
#else
#define TEST_TX_STARTED
#define TEST_TX_DONE
#define TEST_RX_STARTED
#define TEST_RX_DONE
#define TEST_CSMA_STARTED
#define TEST_CSMA_DONE
#define TEST_SPARE_1_ON
#define TEST_SPARE_1_OFF
#define TEST_SPARE_2_ON
#define TEST_SPARE_2_OFF
#endif //TEST_GPIOS_ENABLED

#endif /* MBED_CONF_NANOSTACK_CONFIGURATION */
#endif /* NANOSTACK_RF_PHY_ATMEL_H_ */
262 changes: 262 additions & 0 deletions components/802.15.4_RF/atmel-rf-driver/source/AT86RF215Reg.h
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@@ -0,0 +1,262 @@
/*
* Copyright (c) 2020 ARM Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

#ifndef AT86RF215REG_H_
#define AT86RF215REG_H_
#ifdef __cplusplus
extern "C" {
#endif


/*Register addresses*/
#define RF09_IRQS 0x00
#define RF24_IRQS 0x01
#define BBC0_IRQS 0x02
#define BBC1_IRQS 0x03
#define RF_CFG 0x06
#define RF_IQIFC1 0x0B
#define RF_PN 0x0D
#define RF_VN 0x0E
#define RF_IRQM 0x00
#define RF_STATE 0x02
#define RF_CMD 0x03
#define RF_CS 0x04
#define RF_CCF0L 0x05
#define RF_CCF0H 0x06
#define RF_CNL 0x07
#define RF_CNM 0x08
#define RF_RXBWC 0x09
#define RF_RXDFE 0x0A
#define RF_AGCC 0x0B
#define RF_AGCS 0x0C
#define RF_RSSI 0x0D
#define RF_EDC 0x0E
#define RF_EDV 0x10
#define RF_TXCUTC 0x12
#define RF_TXDFE 0x13
#define BBC_IRQM 0x00
#define BBC_PC 0x01
#define BBC_RXFLL 0x04
#define BBC_RXFLH 0x05
#define BBC_TXFLL 0x06
#define BBC_TXFLH 0x07
#define BBC_FBLL 0x08
#define BBC_FBLH 0x09
#define BBC_OQPSKC0 0x10
#define BBC_OQPSKC1 0x11
#define BBC_OQPSKC2 0x12
#define BBC_OQPSKC3 0x13
#define BBC_OQPSKPHRTX 0x14
#define BBC_OQPSKPHRRX 0x15
#define BBC_AFC0 0x20
#define BBC_AFFTM 0x22
#define BBC_MACEA0 0x25
#define BBC_MACPID0F0 0x2D
#define BBC_MACSHA0F0 0x2F
#define BBC_AMCS 0x40
#define BBC_AMEDT 0x41
#define BBC_AMAACKTL 0x43
#define BBC_AMAACKTH 0x44
#define BBC_FSKC0 0x60
#define BBC_FSKC1 0x61
#define BBC_FSKC2 0x62
#define BBC_FSKC3 0x63
#define BBC_FSKPLL 0x65
#define BBC_FSKPHRTX 0x6A
#define BBC_FSKPHRRX 0x6B
#define BBC0_FBRXS 0x2000
#define BBC0_FBTXS 0x2800
#define BBC1_FBRXS 0x3000
#define BBC1_FBTXS 0x3800

// RF_AGCC
#define AGCI (1 << 6)
#define AVGS 0x30
#define AVGS_8_SAMPLES (0 << 4)

// RF_AGCS
#define TGT 0xE0
#define TGT_1 (1 << 5)


// RF_RXBWC
#define BW 0x0F
#define RF_BW2000KHZ_IF2000KHZ (11 << 0)
#define RF_BW1600KHZ_IF2000KHZ (10 << 0)
#define RF_BW1250KHZ_IF2000KHZ (9 << 0)
#define RF_BW1000KHZ_IF1000KHZ (8 << 0)
#define RF_BW800KHZ_IF1000KHZ (7 << 0)
#define RF_BW630KHZ_IF1000KHZ (6 << 0)
#define RF_BW500KHZ_IF500KHZ (5 << 0)
#define RF_BW400KHZ_IF500KHZ (4 << 0)
#define RF_BW320KHZ_IF500KHZ (3 << 0)
#define RF_BW250KHZ_IF250KHZ (2 << 0)
#define RF_BW200KHZ_IF250KHZ (1 << 0)
#define RF_BW160KHZ_IF250KHZ (0 << 0)
#define IFS (1 << 4)

// RF_TXCUTC
#define PARAMP 0xC0
#define RF_PARAMP32U (3 << 6)
#define RF_PARAMP16U (2 << 6)
#define RF_PARAMP8U (1 << 6)
#define RF_PARAMP4U (0 << 6)
#define LPFCUT 0x0F
#define RF_FLC80KHZ (0 << 0)
#define RF_FLC100KHZ (1 << 0)
#define RF_FLC125KHZ (2 << 0)
#define RF_FLC160KHZ (3 << 0)
#define RF_FLC200KHZ (4 << 0)
#define RF_FLC250KHZ (5 << 0)
#define RF_FLC315KHZ (6 << 0)
#define RF_FLC400KHZ (7 << 0)
#define RF_FLC500KHZ (8 << 0)
#define RF_FLC625KHZ (9 << 0)
#define RF_FLC800KHZ (10 << 0)
#define RF_FLC1000KHZ (11 << 0)

// RF_TXDFE, RF_RXDFE
#define RCUT 0xE0
#define RCUT_4 (4 << 5)
#define RCUT_2 (2 << 5)
#define RCUT_1 (1 << 5)
#define RCUT_0 (0 << 5)
#define SR 0x0F
#define SR_10 (10 << 0)
#define SR_8 (8 << 0)
#define SR_6 (6 << 0)
#define SR_5 (5 << 0)
#define SR_4 (4 << 0)
#define SR_3 (3 << 0)
#define SR_2 (2 << 0)
#define SR_1 (1 << 0)

// BBC_FSKC0
#define BT 0xC0
#define BT_20 (3 << 6)
#define BT_10 (1 << 6)
#define MIDXS 0x30
#define MIDXS_0 (0 << 4)
#define MIDX 0x0E
#define MIDX_10 (3 << 1)
#define MIDX_075 (2 << 1)
#define MIDX_05 (1 << 1)
#define MIDX_0375 (0 << 1)

// BBC_FSKC1
#define SRATE 0x0F
#define SRATE_400KHZ (5 << 0)
#define SRATE_300KHZ (4 << 0)
#define SRATE_200KHZ (3 << 0)
#define SRATE_150KHZ (2 << 0)
#define SRATE_100KHZ (1 << 0)
#define SRATE_50KHZ (0 << 0)

// BBC_FSKC2
#define RXO 0x60
#define RXO_DIS (0 << 5)
#define FECIE (1 << 0)

// BBC_FSKC3
#define SFDT 0xF0
#define PDT 0x0F
#define PDT_6 (6 << 0)

// BBC_AFFTM
#define TYPE_2 (1 << 2)

// BBC_AFC0
#define PM (1 << 4)
#define AFEN3 (1 << 3)
#define AFEN2 (1 << 2)
#define AFEN1 (1 << 1)
#define AFEN0 (1 << 0)

// BBC_OQPSKPHRTX
#define LEG (1 << 0)

// BBC_OQPSKC0
#define FCHIP 0x03
#define BB_FCHIP100 (0 << 0)
#define BB_FCHIP200 (1 << 0)
#define BB_FCHIP1000 (2 << 0)
#define BB_FCHIP2000 (3 << 0)

// BBC_OQPSKC2
#define FCSTLEG 0x04
#define RXM 0x03
#define FCS_16 (1 << 2)
#define RXM_2 (2 << 0)

// BBC_IRQS, BBC_IRQM
#define FBLI (1 << 7)
#define AGCR (1 << 6)
#define AGCH (1 << 5)
#define TXFE (1 << 4)
#define RXEM (1 << 3)
#define RXAM (1 << 2)
#define RXFE (1 << 1)
#define RXFS (1 << 0)

//BBC_PC
#define BBEN (1 << 2)
#define PT 0x03
#define BB_PHYOFF (0 << 0)
#define BB_MRFSK (1 << 0)
#define BB_MROFDM (2 << 0)
#define BB_MROQPSK (3 << 0)
#define FCSOK (1 << 5)
#define TXAFCS (1 << 4)
#define FCST (1 << 3)
#define FCSFE (1 << 6)

//BBC_AMCS
#define AACKFT (1 << 7)
#define AACK (1 << 3)
#define CCAED (1 << 2)

// RF_IQIFC1
#define CHPM 0x70
#define RF_MODE_BBRF (0 << 4)
#define RF_MODE_RF (1 << 4)
#define RF_MODE_BBRF09 (4 << 4)
#define RF_MODE_BBRF24 (5 << 4)

/*RF_CFG bits*/
#define IRQMM 0x08
#define IRQP 0x04

/*RFn_IRQM bits*/
#define TRXRDY (1 << 1)
#define EDC (1 << 2)

/*RFn_EDC bits*/
#define EDM 0x03
#define RF_EDAUTO (0 << 0)
#define RF_EDSINGLE (1 << 0)
#define RF_EDCONT (2 << 0)
#define RF_EDOFF (3 << 0)

/*Masks*/
#define CNH 0x01
#define EDM 0x03
#define CHPM 0x70

#ifdef __cplusplus
}
#endif

#endif /* AT86RF215REG_H_ */
1 change: 1 addition & 0 deletions components/802.15.4_RF/atmel-rf-driver/source/AT86RFReg.h
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Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,7 @@ extern "C" {
#define PART_AT86RF231 0x03
#define PART_AT86RF212 0x07
#define PART_AT86RF233 0x0B
#define PART_AT86RF215 0x34
#define VERSION_AT86RF212 0x01
#define VERSION_AT86RF212B 0x03

Expand Down
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