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Fix AnalogIn implementation on STM32G4 series #13601
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e9d6c9c
Fix AnalogIn implementation on STM32G4 series
AGlass0fMilk bbc15f6
Implemented adc deinitialization functionality
AGlass0fMilk bbc7355
Merge internal ADC channel changes from ST
jeromecoutant 76d488d
Revert sampling time decrease and remove todos.
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Really need so much time ?
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If my math is correct, with the PCLK @ 180MHz and the ADC prescaler set to DIV2, a sample time of 24.5 clock cycles is only ~272 nanoseconds... I think this is quite short for most of the slow signals Mbed users will be trying to read with the simple
AnalogIn
API.My comment from before:
Perhaps we could increase the ADC prescaler?