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driver/i2c: STM32: I2C memory usage and time delay in read-write solved. #14776

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Merged
merged 2 commits into from
Jun 29, 2021
Merged

driver/i2c: STM32: I2C memory usage and time delay in read-write solved. #14776

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ef5ac45
driver/i2c: STM32: I2C Read Write Take long time
affrinpinhero-2356 Jun 15, 2021
8f24f09
driver/i2c: STM32: Solves excess memory usage issue.
affrinpinhero-2356 Jun 15, 2021
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14 changes: 13 additions & 1 deletion targets/TARGET_STM/TARGET_STM32F0/i2c_device.c
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Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,13 @@ uint32_t i2c_get_pclk(I2CName i2c)
pclk = HSI_VALUE;
break;
}
} else {
}
#if defined I2C2_BASE
else if (i2c == I2C_2) {
pclk = HAL_RCC_GetSysClockFreq();
}
#endif
else {
// should not happend
error("I2C: unknown instance");
}
Expand Down Expand Up @@ -78,7 +84,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
}

else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance*/
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
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Shouldn't this be an error rather and print a message how to fix it?

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Mentioned as a comment what to do assert occurred. So I think this will be enough.

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
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5 changes: 4 additions & 1 deletion targets/TARGET_STM/TARGET_STM32F0/i2c_device.h
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Expand Up @@ -48,10 +48,13 @@ extern "C" {
#define I2CAPI_I2C1_CLKSRC RCC_I2C1CLKSOURCE_SYSCLK

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO

#endif // DEVICE_I2C

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6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32F3/i2c_device.c
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Expand Up @@ -122,7 +122,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
}

else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance*/
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
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5 changes: 4 additions & 1 deletion targets/TARGET_STM/TARGET_STM32F3/i2c_device.h
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Expand Up @@ -62,10 +62,13 @@ extern "C" {
#define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO

#endif // DEVICE_I2C

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6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32F7/i2c_device.c
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Expand Up @@ -133,7 +133,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
break;
}
} else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance*/
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
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5 changes: 4 additions & 1 deletion targets/TARGET_STM/TARGET_STM32F7/i2c_device.h
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Expand Up @@ -57,10 +57,13 @@ extern "C" {
#define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_PCLK1

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO

#endif // DEVICE_I2C

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6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32G0/i2c_device.c
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Expand Up @@ -78,7 +78,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
break;
}
} else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance*/
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
Expand Down
5 changes: 4 additions & 1 deletion targets/TARGET_STM/TARGET_STM32G0/i2c_device.h
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Expand Up @@ -47,10 +47,13 @@ extern "C" {
#define I2CAPI_I2C2_CLKSRC RCC_I2C2CLKSOURCE_SYSCLK

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO

#endif // DEVICE_I2C

Expand Down
6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32G4/i2c_device.c
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Original file line number Diff line number Diff line change
Expand Up @@ -133,7 +133,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
break;
}
} else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance*/
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
Expand Down
8 changes: 5 additions & 3 deletions targets/TARGET_STM/TARGET_STM32G4/i2c_device.h
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Expand Up @@ -29,7 +29,7 @@ extern "C" {
#define TIMING_VAL_DEFAULT_CLK_100KHZ 0xC0311319 // Standard mode with Rise Time = 400ns and Fall Time = 100ns
#define TIMING_VAL_DEFAULT_CLK_400KHZ 0x10B1102E // Fast mode with Rise Time = 250ns and Fall Time = 100ns
#define TIMING_VAL_DEFAULT_CLK_1MHZ 0x00710B1E // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
#define I2C_PCLK_DEF 170000000 // 170 MHz
#define I2C_PCLK_DEF 160000000 // 160 MHz

/* Define IP version */
#define I2C_IP_VERSION_V2
Expand All @@ -43,11 +43,13 @@ extern "C" {
#define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);

#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
#endif // DEVICE_I2C

#ifdef __cplusplus
Expand Down
6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32H7/i2c_device.c
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Expand Up @@ -116,7 +116,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
break;
}
} else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance*/
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
Expand Down
5 changes: 4 additions & 1 deletion targets/TARGET_STM/TARGET_STM32H7/i2c_device.h
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Expand Up @@ -43,10 +43,13 @@ extern "C" {
#define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_D3PCLK1

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO

#endif // DEVICE_I2C

Expand Down
6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32L0/i2c_device.c
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Expand Up @@ -103,7 +103,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
break;
}
} else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance*/
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
Expand Down
5 changes: 4 additions & 1 deletion targets/TARGET_STM/TARGET_STM32L0/i2c_device.h
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Expand Up @@ -54,10 +54,13 @@ extern "C" {
#define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO

#endif // DEVICE_I2C

Expand Down
6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32L4/i2c_device.c
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Expand Up @@ -168,7 +168,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
break;
}
} else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance*/
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
Expand Down
5 changes: 4 additions & 1 deletion targets/TARGET_STM/TARGET_STM32L4/i2c_device.h
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Expand Up @@ -57,10 +57,13 @@ extern "C" {
#define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO

#endif // DEVICE_I2C

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6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32L5/i2c_device.c
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Expand Up @@ -142,7 +142,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
}

else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance */
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
Expand Down
5 changes: 4 additions & 1 deletion targets/TARGET_STM/TARGET_STM32L5/i2c_device.h
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Expand Up @@ -43,10 +43,13 @@ extern "C" {
#define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO

#endif // DEVICE_I2C

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6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32WB/i2c_device.c
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Expand Up @@ -140,7 +140,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
}

else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance */
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
Expand Down
7 changes: 5 additions & 2 deletions targets/TARGET_STM/TARGET_STM32WB/i2c_device.h
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Expand Up @@ -24,7 +24,7 @@
extern "C" {
#endif

/* Define I2C Device */
/* Define I2C Device */
#if DEVICE_I2C

/* Define IP version */
Expand All @@ -50,10 +50,13 @@ extern "C" {
#define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO

#endif // DEVICE_I2C

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6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32WL/i2c_device.c
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Expand Up @@ -125,7 +125,13 @@ uint32_t i2c_get_timing(I2CName i2c, int hz)
}

else {
/* If MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO assert is triggered.
User needs to enable I2C_TIMING_VALUE_ALGO in target.json for specific target.
Enabling this may impact performance */
MBED_ASSERT(MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO);
#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
tim = i2c_compute_timing(pclk, hz);
#endif
}
return tim;
}
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5 changes: 4 additions & 1 deletion targets/TARGET_STM/TARGET_STM32WL/i2c_device.h
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Expand Up @@ -42,10 +42,13 @@ extern "C" {
#define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK

uint32_t i2c_get_pclk(I2CName i2c);
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
uint32_t i2c_get_timing(I2CName i2c, int hz);

#if MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO
uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
#endif // MBED_CONF_TARGET_I2C_TIMING_VALUE_ALGO

#endif // DEVICE_I2C

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