Added support for SAMG55

[Parthasarathy]

No description provided.

[Parthasarathy]

Review comments are available at : #1550

[0xc0170]

I'll pull this sources soon to review, Serial async test - there was one failure, is this fixed?

[Parthasarathy]

@0xc0170

The following Serial async test failure was due to a limitation, the test expects to abort transfer once character match happens, Since we are using DMA to transfer by the time character match is identified the transfer is completed so the test fails.

TEST(Serial_Asynchronous, char_matching_success)

[0xc0170]

I see. That is expected. the char match is intended in this cases to fallback to IRQ in most cases.

[akhilpanayamparambil]

Hi @0xc0170
Please let me know if we have any update on this PL.

[0xc0170]

I pulled this locally last Friday, have to go through it as github fails with this big PR. My goal is to get this resolved within Tuesday

cc @bridadan New targets

[akhilpanayamparambil]

Thanks for the update @0xc0170 👍

[0xc0170]

@akhilpanayamparambil @Parthasarathy The merge button provided an option squash for this one 😭 (there are 2 ways to merge now on github, I just clicked on merge button, overlooked it was the squash one). We could revert that commit, and send the new patch with all this history. Let me know

[kgoveas]

Hi @Parthasarathy ,

There seems to be a bug in the implementation of the SPI.

In spi_driver.c, line 318,
void spi_set_clock_phase(Spi *p_spi, uint32_t ul_pcs_ch, uint32_t ul_phase) { if (ul_phase) { p_spi->SPI_CSR[ul_pcs_ch] |= SPI_CSR_NCPHA; } else { p_spi->SPI_CSR[ul_pcs_ch] &= (~SPI_CSR_NCPHA); } }
For phase = 0, phase = 1 is applied.

It works as expected if the following line is amended to,
if (!ul_phase)

[Parthasarathy]

Thanks @kgoveas, I will fix it.