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[rtos] Fixed registers clobbered SVC_Handler in IAR #1905

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Merged
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Jun 12, 2016
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[rtos] Fixed registers clobbered SVC_Handler in IAR #1905

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2 changes: 1 addition & 1 deletion rtos/rtx/TARGET_CORTEX_M/rt_CMSIS.c
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Original file line number Diff line number Diff line change
Expand Up @@ -302,7 +302,7 @@ static inline t __##f (t1 a1, t2 a2, t3 a3, t4 a4) { \
#define SVC_Setup(f) \
__asm( \
"mov r12,%0\n" \
:: "r"(&f): "r12" \
:: "r"(&f): "r0", "r1", "r2", "r3", "r12" \
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Might want to add "memory" to the clobber list as well. This will force all global variables to be written out before the call.

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@geky geky Jun 12, 2016 •
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It is emitting an IAR specific __swi function declaration and call for each svc, so the compiler should be able to handle the memory ordering appropriately. The issue is that the functions are emitted with fewer arguments than are clobbered in the svc handler.

_Pragma("swi_number=0") __swi t _##f (t1 a1);

rt_CMSIS.c#L323

);

#define SVC_Ret3() \
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