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Jun 12, 2016
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29 changes: 29 additions & 0 deletions hal/common/retarget.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -636,6 +636,35 @@ extern "C" WEAK void __iar_file_Mtxinit(__iar_Rmtx *mutex) {}
extern "C" WEAK void __iar_file_Mtxdst(__iar_Rmtx *mutex) {}
extern "C" WEAK void __iar_file_Mtxlock(__iar_Rmtx *mutex) {}
extern "C" WEAK void __iar_file_Mtxunlock(__iar_Rmtx *mutex) {}
#elif defined(__CC_ARM)
// Do nothing
#elif defined (__GNUC__)
struct _reent;
// Stub out locks when an rtos is not present
extern "C" WEAK void __rtos_malloc_lock( struct _reent *_r ) {}
extern "C" WEAK void __rtos_malloc_unlock( struct _reent *_r ) {}
extern "C" WEAK void __rtos_env_lock( struct _reent *_r ) {}
extern "C" WEAK void __rtos_env_unlock( struct _reent *_r ) {}

void __malloc_lock( struct _reent *_r )
{
__rtos_malloc_lock(_r);
}

void __malloc_unlock( struct _reent *_r )
{
__rtos_malloc_unlock(_r);
}

void __env_lock( struct _reent *_r )
{
__rtos_env_lock(_r);
}

void __env_unlock( struct _reent *_r )
{
__rtos_env_unlock(_r);
}
#endif

} // namespace mbed
193 changes: 128 additions & 65 deletions hal/targets.json

Large diffs are not rendered by default.

2 changes: 1 addition & 1 deletion rtos/rtx/TARGET_CORTEX_A/RTX_CM_lib.h
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@
#define _declare_box(pool,size,cnt) uint32_t pool[(((size)+3)/4)*(cnt) + 3]
#define _declare_box8(pool,size,cnt) uint64_t pool[(((size)+7)/8)*(cnt) + 2]

#define OS_TCB_SIZE 52
#define OS_TCB_SIZE 60
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@0xc0170 0xc0170 Jun 12, 2016

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is this sizeof OS_TCB as I recall? have we changed it , or the 52 was miscalculation on our side?

I dont fully understand the fix (how it fixes)

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Yep, it is the size of OS_TCB. It was defiantly too small on the cortex M. I didn't run the cortex A but I think this one was too small as well.

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I git blame, seems like void *context was aded there, did I miss anything else? that would make it only increased by 4?

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I printed out the size for cortex M and it was 60

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ah ok, so for cortex-m it's 60,but cortex a was not changed with context pointer, thus might be different.

cc @TomoYamanaka please have a look at this changeset

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Hi.

Code of review test is completed.There is no problem.

Regards,
Yamanaka

#define OS_TMR_SIZE 8

#if defined (__CC_ARM) && !defined (__MICROLIB)
Expand Down
5 changes: 5 additions & 0 deletions rtos/rtx/TARGET_CORTEX_A/RTX_Conf_CA.c
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,11 @@
* RTX User configuration part BEGIN
*---------------------------------------------------------------------------*/

#if defined(MBED_RTOS_SINGLE_THREAD)
#define OS_TASKCNT 1
#define OS_TIMERS 0
#endif

//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
//
// <h>Thread Configuration
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21 changes: 14 additions & 7 deletions rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,7 @@
#define _declare_box(pool,size,cnt) uint32_t pool[(((size)+3)/4)*(cnt) + 3]
#define _declare_box8(pool,size,cnt) uint64_t pool[(((size)+7)/8)*(cnt) + 2]

#define OS_TCB_SIZE 52
#define OS_TCB_SIZE 60
#define OS_TMR_SIZE 8

typedef void *OS_ID;
Expand Down Expand Up @@ -527,11 +527,18 @@ extern uint32_t __end__[];
#endif

void set_main_stack(void) {
uint32_t interrupt_stack_size = ((uint32_t)OS_MAINSTKSIZE * 4);
uint32_t heap_plus_stack_size = ((uint32_t)INITIAL_SP - (uint32_t)HEAP_START) - interrupt_stack_size;
// Main thread's stack is 1/4 of the heap
uint32_t main_stack_size = heap_plus_stack_size / 4;
// The main thread must be 4 byte aligned
uint32_t main_stack_start = ((uint32_t)INITIAL_SP - interrupt_stack_size - main_stack_size) & ~0x7;

// That is the bottom of the main stack block: no collision detection
os_thread_def_main.stack_pointer = HEAP_START;
os_thread_def_main.stack_pointer = (uint32_t*)main_stack_start;

// Leave OS_MAINSTKSIZE words for the scheduler and interrupts
os_thread_def_main.stacksize = (INITIAL_SP - (unsigned int)HEAP_START) - (OS_MAINSTKSIZE * 4);
os_thread_def_main.stacksize = main_stack_size;
}

#if defined (__CC_ARM)
Expand Down Expand Up @@ -677,22 +684,22 @@ __attribute__((naked)) void software_init_hook_rtos (void) {
// Opaque declaration of _reent structure
struct _reent;

void __malloc_lock( struct _reent *_r )
void __rtos_malloc_lock( struct _reent *_r )
{
osMutexWait(malloc_mutex_id, osWaitForever);
}

void __malloc_unlock( struct _reent *_r )
void __rtos_malloc_unlock( struct _reent *_r )
{
osMutexRelease(malloc_mutex_id);
}

void __env_lock( struct _reent *_r )
void __rtos_env_lock( struct _reent *_r )
{
osMutexWait(env_mutex_id, osWaitForever);
}

void __env_unlock( struct _reent *_r )
void __rtos_env_unlock( struct _reent *_r )
{
osMutexRelease(env_mutex_id);
}
Expand Down
5 changes: 5 additions & 0 deletions rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,11 @@
* RTX User configuration part BEGIN
*---------------------------------------------------------------------------*/

#if defined(MBED_RTOS_SINGLE_THREAD)
#define OS_TASKCNT 1
#define OS_TIMERS 0
#endif

//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
//
// <h>Thread Configuration
Expand Down
4 changes: 4 additions & 0 deletions tools/toolchains/arm.py
Original file line number Diff line number Diff line change
Expand Up @@ -242,6 +242,10 @@ def __init__(self, target, options=None, notify=None, macros=None, silent=False,
self.cppc += ["-D__MICROLIB", "--library_type=microlib"]
self.ld += ["--library_type=microlib"]

# Only allow a single thread
self.cc += ["-DMBED_RTOS_SINGLE_THREAD"]
self.cppc += ["-DMBED_RTOS_SINGLE_THREAD"]

# We had to patch microlib to add C++ support
# In later releases this patch should have entered mainline
if ARM_MICRO.PATCHED_LIBRARY:
Expand Down
16 changes: 15 additions & 1 deletion tools/toolchains/gcc.py
Original file line number Diff line number Diff line change
Expand Up @@ -252,8 +252,22 @@ def __init__(self, target, options=None, notify=None, macros=None, silent=False,
GCC.__init__(self, target, options, notify, macros, silent, GCC_ARM_PATH, extra_verbose=extra_verbose)

# Use latest gcc nanolib
if "thread-safe" not in self.options:
if "big-build" in self.options:
use_nano = False
elif "small-build" in self.options:
use_nano = True
elif target.default_build == "standard":
use_nano = False
elif target.default_build == "small":
use_nano = True
else:
use_nano = False

if use_nano:
self.ld.append("--specs=nano.specs")
self.cc += ["-DMBED_RTOS_SINGLE_THREAD"]
self.cppc += ["-DMBED_RTOS_SINGLE_THREAD"]

if target.name in ["LPC1768", "LPC4088", "LPC4088_DM", "LPC4330", "UBLOX_C027", "LPC2368"]:
self.ld.extend(["-u _printf_float", "-u _scanf_float"])
elif target.name in ["RZ_A1H", "VK_RZ_A1H", "ARCH_MAX", "DISCO_F407VG", "DISCO_F429ZI", "DISCO_F469NI", "NUCLEO_F401RE", "NUCLEO_F410RB", "NUCLEO_F411RE", "NUCLEO_F446RE", "ELMO_F411RE", "MTS_MDOT_F411RE", "MTS_DRAGONFLY_F411RE", "DISCO_F746NG"]:
Expand Down