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merged 14 commits into from
Nov 16, 2016
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11 changes: 7 additions & 4 deletions features/unsupported/tests/mbed/i2c_master_slave_asynch/main.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,6 @@ I2CSlave slave(D3, D6);
volatile int why;
volatile bool master_complete = false;
void cbmaster_done(int event) {
printf("cbmaster_done\n");
master_complete = true;
why = event;
}
Expand All @@ -70,7 +69,8 @@ int main()

// First transfer: master to slave
printf("\nFirst transfer: Master Tx, Repeated Start\n");
master.transfer(ADDR, buf_master, SIZE, 0, 0, callback, I2C_EVENT_ALL, true);
if(master.transfer(ADDR, buf_master, SIZE, 0, 0, callback, I2C_EVENT_ALL, true) != 0)
notify_completion(false);

while (!master_complete) {
if(slave.receive() == I2CSlave::WriteAddressed) {
Expand All @@ -90,7 +90,8 @@ int main()

// Second transfer: slave to master
printf("\nSecond transfer: Master Rx\n");
master.transfer(ADDR, 0, 0, res_master, SIZE, callback, I2C_EVENT_ALL, true);
if(master.transfer(ADDR, 0, 0, res_master, SIZE, callback, I2C_EVENT_ALL, true) != 0)
notify_completion(false);

while (!master_complete) {
if(slave.receive() == I2CSlave::ReadAddressed) {
Expand Down Expand Up @@ -118,7 +119,8 @@ int main()

// Third transfer: Tx/Rx
printf("\nThird transfer: Master Tx/Rx\n");
master.transfer(ADDR, buf_master_tx, SIZE, buf_master_rx, SIZE, callback, I2C_EVENT_ALL, false);
if(master.transfer(ADDR, buf_master_tx, SIZE, buf_master_rx, SIZE, callback, I2C_EVENT_ALL, false) != 0)
notify_completion(false);

while (!master_complete) {

Expand All @@ -130,6 +132,7 @@ int main()
buf_slave_txrx[i]++;
}
}

if((i == I2CSlave::ReadAddressed) ) {
slave.write(buf_slave_txrx, SIZE);
}
Expand Down
16 changes: 14 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F4/common_objects.h
Original file line number Diff line number Diff line change
Expand Up @@ -84,17 +84,29 @@ struct spi_s {
};

struct i2c_s {
/* The 1st 2 members I2CName i2c
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curiousity: what's the reasoning for this comment, should it be mentioned ??

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This is a requirement for get_i2c_obj function to work - if anyone changes this order, this would break the mechanism to get a pointer to the i2c_s object when having a pointer to the contained handle.

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Thanks for the explanation, it was not clear from the comment why there's that requirement

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ok - I'll update the comment to be more precise

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OK let me know once done . I'll go through the files once again, trigger CI afterwards

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done - I updated the comment

* and I2C_HandleTypeDef handle should
* be kept as the first members of this struct
* to have get_i2c_obj() function work as expected
*/
I2CName i2c;
I2C_HandleTypeDef handle;
uint8_t index;
PinName sda;
PinName scl;
IRQn_Type event_i2cIRQ;
IRQn_Type error_i2cIRQ;
uint8_t XferOperation;
volatile uint8_t event;
#if DEVICE_I2CSLAVE
uint8_t slave;
volatile uint8_t pending_slave_tx_master_rx;
volatile uint8_t pending_slave_rx_maxter_tx;
#endif
#if DEVICE_I2C_ASYNCH
uint32_t address;
uint8_t event;
uint8_t stop;
uint8_t available_events;
uint8_t XferOperation;
#endif
};

Expand Down
3 changes: 2 additions & 1 deletion targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.c
Original file line number Diff line number Diff line change
Expand Up @@ -3960,7 +3960,8 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);

hi2c->State = HAL_I2C_STATE_READY;

hi2c->PreviousState = I2C_STATE_NONE;

if(hi2c->Mode == HAL_I2C_MODE_MEM)
{
hi2c->Mode = HAL_I2C_MODE_NONE;
Expand Down
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