Stm32f7 ethernet fix for IAR issue #3387 #3473
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Hi @0xc0170 What am I supposed to do ? |
Develop on master please, can you take your commits and based them on top of the master please? |
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Rebase done. but it seems that the example is not working on the latest version of mbed-os, for some other reasons (and not only with IAR this time) |
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@adustm I checked out your branch locally and tried running the following command: However my test failed with the following log: Can you confirm that you're seeing the same failure on your side as well? |
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Seems to me that rebase was not done correctly as there are 2 commits that are already on master? |
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Hello @0xc0170 @bridadan I have made many tests before and after the fix to convince you. I still have an issue with the udp_echo_client for the NUCLEO_F746ZG_IAR. Either is does not connect at all, either it does, but stops after a few loop of send/receive. I cannot figure out why, and it has probably nothing to do with the current bug fix. BEFORE the PR (results from mbed-os-5.3.0):AFTER THE PR:(*)either it connect but crashes after several loops, either it does not connect Merry Christmas to all of you |
…se the DMA descriptors if they are located in SRAM1 and SRAM2
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@adustm Thanks ! We will review it |
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/morph test-nightly |
Result: SUCCESSYour command has finished executing! Here's what you wrote!
OutputAll builds and test passed! |
0xc0170
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Description
See the detailed explanation of the issue here
A few sentences describing the overall goals of the pull request's commits.
#3387
The ethernet buffers are located in the SRAM1 memory that has data cache enable.
Extract from the mbed.map:
The DMA descriptors are written by the CPU, and kept in cache.
The Ethernet IP is then reading the DMA descriptor in the SRAM1 memory, that does not contains the requested information (still in cache)
You can see in the Reference Manual of STM32F746 that we set an address for the DMA descriptor to the ETH registers, and that the IP is reading this address directly.
http://www.st.com/resource/en/reference_manual/dm00124865.pdf page 1586 for ETH_DMATDLAR
It used to work before because those buffers' allocation was hard coded on 0x2000xxxx
This memory is the DTCM ram, 0 wait state, no cache. It can remain like this, but it is not the best performance choice (because when Ethernet is accessing the datas, the CPU is blocked).
The best choice is then to use SRAM1 and disable the data cache. The SRAM1 and SRAM2 are really fast and the system performance should not suffer from this choice.
Status
READY
Todos
I was able to fix features-feature_lwip-tests-mbedmicro-net-udp_echo_client test with this bug fix.
@geky or someone else, could you check that it also solves the issue #3387 ?
Steps to test or reproduce
before this PR :
mbed test -m NUCLEO_F746ZG -t IAR -n features-feature_lwip-tests-mbedmicro-net-udp_echo_client was failing
now it works