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[LPC15xx] CAN implementation improvements #3504
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ducky64
commented
Dec 26, 2016
- Add support for TX interrupts.
- Allocates dedicated TX messageboxes (instead of runtime-allocating a messagebox when requested).
- Change RX and TX interrupt style from messagebox-based to controller based.
- This is the simplest implementation - both irq_set and filter modify the messagebox control registers, and both can be called at any time, in any order. However, this could be implemented with a more complex read-modify-write of messagebox control registers.
- Add support for error-warning, error-passive, and bus-off status change interrupts.
- Since the controller hardware only provides a general error status change interrupt flag, it isn't possible to differentiate between which one caused the interrupt. Therefore, it is possible to have error-warning interrupts fire multiple times (once going into error-warning, again going into error-passive, and again when going into bus-off; possibly also with any TX/RX interrupt while in an error state). There should never be "incorrect" interrupts, only extraneous interrupts.
- can_reset now also clears a bus-off error.
- Possibly undesirably, it seems CAN read and CAN write also does the same, though since the API is so vague about it, I'm not changing the implementation.
cc @toyowata |
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Reviewed and added a comment.
@ducky64 Please can you provide any test result of this PR, if you have.
// Put CAN in Reset Mode and enable interrupt | ||
can_disable(obj); | ||
if (enable == 0) { | ||
LPC_C_CAN0->CANCNTL &= ~(1UL << 1 | 1UL << 2); | ||
if (!(enabled_irqs && IRQ_ENABLE_ANY)) { |
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Is this operator &&
(logical AND) intentional here? I think this should be operator &
(Bitwise AND).
That was a typo; fixed (along with two more instances of the same; derp...). I tested this on a CAN network with 3 LPC1549 devices. The tests involved attaching interrupts to RxIrq, TxIrq, EwIrq, EpIrq, and BeIrq that toggle different LEDs. So basically the requested interrupts do get triggered. I don't really have the resources to generate exactly enough errors to trip error-warning or error-passive, but the results smell sane... |
/morph test-nightly |
Result: SUCCESSYour command has finished executing! Here's what you wrote!
OutputAll builds and test passed! |
@toyowata Happy with this patch? |
@0xc0170 Yes, LGTM. |
Ports for Upcoming Targets Fixes and Changes 3488: Dev stm i2c v2 unitary functions ARMmbed/mbed-os#3488 3492: Fix #3463 CAN read() return value ARMmbed/mbed-os#3492 3503: [LPC15xx] Ensure that PWM=1 is resolved correctly ARMmbed/mbed-os#3503 3504: [LPC15xx] CAN implementation improvements ARMmbed/mbed-os#3504 3539: NUCLEO_F412ZG - Add support of TRNG peripheral ARMmbed/mbed-os#3539 3540: STM: SPI: Initialize Rx in spi_master_write ARMmbed/mbed-os#3540 3438: K64F: Add support for SERIAL ASYNCH API ARMmbed/mbed-os#3438 3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set ARMmbed/mbed-os#3519 3544: STM32L4 deepsleep improvement ARMmbed/mbed-os#3544 3546: NUCLEO-F412ZG - Add CAN peripheral ARMmbed/mbed-os#3546 3551: Fix I2C driver for RZ/A1H ARMmbed/mbed-os#3551 3558: K64F UART Asynch API: Fix synchronization issue ARMmbed/mbed-os#3558 3563: LPC4088 - Fix vector checksum ARMmbed/mbed-os#3563 3567: Dev stm32 F0 v1.7.0 ARMmbed/mbed-os#3567 3577: Fixes linking errors when building with debug profile ARMmbed/mbed-os#3577