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Merged
merged 1 commit into from
Jan 16, 2017
Merged

STM32F7 Cube FW new release v1.5.1 #3583

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79 changes: 40 additions & 39 deletions targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f746xx.h
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f746xx.h
* @author MCD Application Team
* @version V1.1.0
* @date 22-April-2016
* @version V1.1.2
* @date 23-September-2016
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
*
* This file contains:
Expand Down Expand Up @@ -314,7 +314,6 @@ typedef struct
__IO uint32_t IER; /*!< CEC interrupt enable register, Address offset:0x14 */
}CEC_TypeDef;


/**
* @brief CRC calculation unit
*/
Expand Down Expand Up @@ -407,7 +406,6 @@ typedef struct
__IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
} DMA_TypeDef;


/**
* @brief DMA2D Controller
*/
Expand Down Expand Up @@ -854,7 +852,6 @@ typedef struct
__IO uint32_t DIR; /*!< Debug Information register, Address offset: 0x18 */
} SPDIFRX_TypeDef;


/**
* @brief SD host Interface
*/
Expand Down Expand Up @@ -1322,7 +1319,7 @@ typedef struct
#define IWDG ((IWDG_TypeDef *) IWDG_BASE)
#define SPI2 ((SPI_TypeDef *) SPI2_BASE)
#define SPI3 ((SPI_TypeDef *) SPI3_BASE)
#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
#define USART2 ((USART_TypeDef *) USART2_BASE)
#define USART3 ((USART_TypeDef *) USART3_BASE)
#define UART4 ((USART_TypeDef *) UART4_BASE)
Expand Down Expand Up @@ -3667,7 +3664,6 @@ typedef struct

/******************** Bit definition for DMA2D_BGCLUT register **************/


/******************************************************************************/
/* */
/* External Interrupt/Event Controller */
Expand Down Expand Up @@ -3977,6 +3973,7 @@ typedef struct
#define FLASH_OPTCR1_BOOT_ADD0 0x0000FFFFU
#define FLASH_OPTCR1_BOOT_ADD1 0xFFFF0000U


/******************************************************************************/
/* */
/* Flexible Memory Controller */
Expand Down Expand Up @@ -6044,7 +6041,7 @@ typedef struct
#define RTC_CR_OSEL_1 0x00400000U
#define RTC_CR_POL 0x00100000U
#define RTC_CR_COSEL 0x00080000U
#define RTC_CR_BCK 0x00040000U
#define RTC_CR_BKP 0x00040000U
#define RTC_CR_SUB1H 0x00020000U
#define RTC_CR_ADD1H 0x00010000U
#define RTC_CR_TSIE 0x00008000U
Expand All @@ -6064,6 +6061,9 @@ typedef struct
#define RTC_CR_WUCKSEL_1 0x00000002U
#define RTC_CR_WUCKSEL_2 0x00000004U

/* Legacy define */
#define RTC_CR_BCK RTC_CR_BKP

/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_ITSF 0x00020000U
#define RTC_ISR_RECALPF 0x00010000U
Expand Down Expand Up @@ -6639,7 +6639,6 @@ typedef struct
#define SPDIFRX_DIR_THI 0x000013FFU /*!<Threshold LOW */
#define SPDIFRX_DIR_TLO 0x1FFF0000U /*!<Threshold HIGH */


/******************************************************************************/
/* */
/* SD host Interface */
Expand Down Expand Up @@ -8974,6 +8973,7 @@ typedef struct




/**
* @}
*/
Expand Down Expand Up @@ -9027,28 +9027,28 @@ typedef struct

/******************************* GPIO Instances *******************************/
#define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
((__INSTANCE__) == GPIOB) || \
((__INSTANCE__) == GPIOC) || \
((__INSTANCE__) == GPIOD) || \
((__INSTANCE__) == GPIOE) || \
((__INSTANCE__) == GPIOF) || \
((__INSTANCE__) == GPIOG) || \
((__INSTANCE__) == GPIOH) || \
((__INSTANCE__) == GPIOI) || \
((__INSTANCE__) == GPIOJ) || \
((__INSTANCE__) == GPIOK))
((__INSTANCE__) == GPIOB) || \
((__INSTANCE__) == GPIOC) || \
((__INSTANCE__) == GPIOD) || \
((__INSTANCE__) == GPIOE) || \
((__INSTANCE__) == GPIOF) || \
((__INSTANCE__) == GPIOG) || \
((__INSTANCE__) == GPIOH) || \
((__INSTANCE__) == GPIOI) || \
((__INSTANCE__) == GPIOJ) || \
((__INSTANCE__) == GPIOK))

#define IS_GPIO_AF_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
((__INSTANCE__) == GPIOB) || \
((__INSTANCE__) == GPIOC) || \
((__INSTANCE__) == GPIOD) || \
((__INSTANCE__) == GPIOE) || \
((__INSTANCE__) == GPIOF) || \
((__INSTANCE__) == GPIOG) || \
((__INSTANCE__) == GPIOH) || \
((__INSTANCE__) == GPIOI) || \
((__INSTANCE__) == GPIOJ) || \
((__INSTANCE__) == GPIOK))
((__INSTANCE__) == GPIOB) || \
((__INSTANCE__) == GPIOC) || \
((__INSTANCE__) == GPIOD) || \
((__INSTANCE__) == GPIOE) || \
((__INSTANCE__) == GPIOF) || \
((__INSTANCE__) == GPIOG) || \
((__INSTANCE__) == GPIOH) || \
((__INSTANCE__) == GPIOI) || \
((__INSTANCE__) == GPIOJ) || \
((__INSTANCE__) == GPIOK))

/****************************** CEC Instances *********************************/
#define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
Expand All @@ -9059,14 +9059,14 @@ typedef struct

/******************************** I2C Instances *******************************/
#define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
((__INSTANCE__) == I2C2) || \
((__INSTANCE__) == I2C3) || \
((__INSTANCE__) == I2C4))
((__INSTANCE__) == I2C2) || \
((__INSTANCE__) == I2C3) || \
((__INSTANCE__) == I2C4))

/******************************** I2S Instances *******************************/
#define IS_I2S_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
((__INSTANCE__) == SPI2) || \
((__INSTANCE__) == SPI3))
((__INSTANCE__) == SPI2) || \
((__INSTANCE__) == SPI3))

/******************************* LPTIM Instances ********************************/
#define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
Expand All @@ -9076,6 +9076,7 @@ typedef struct




/******************************* RNG Instances ********************************/
#define IS_RNG_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == RNG)

Expand All @@ -9098,11 +9099,11 @@ typedef struct

/******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
((__INSTANCE__) == SPI2) || \
((__INSTANCE__) == SPI3) || \
((__INSTANCE__) == SPI4) || \
((__INSTANCE__) == SPI5) || \
((__INSTANCE__) == SPI6))
((__INSTANCE__) == SPI2) || \
((__INSTANCE__) == SPI3) || \
((__INSTANCE__) == SPI4) || \
((__INSTANCE__) == SPI5) || \
((__INSTANCE__) == SPI6))

/****************** TIM Instances : All supported instances *******************/
#define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1) || \
Expand Down
34 changes: 24 additions & 10 deletions targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f7xx.h
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f7xx.h
* @author MCD Application Team
* @version V1.1.0
* @date 22-April-2016
* @version V1.1.2
* @date 23-September-2016
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
Expand Down Expand Up @@ -75,7 +75,8 @@
application
*/
#if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
/* #define STM32F756xx */ /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
STM32F756NG Devices */
#define STM32F746xx /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
Expand All @@ -84,11 +85,16 @@
/* #define STM32F765xx */ /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
/* #define STM32F767xx */ /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
/* #define STM32F769xx */ /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
STM32F769NG, STM32F769NI Devices */
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
STM32F769NG, STM32F769NI, STM32F768AI Devices */
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
/* #define STM32F722xx */ /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
STM32F722VC, STM32F722RC Devices */
/* #define STM32F723xx */ /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
/* #define STM32F732xx */ /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
/* #define STM32F733xx */ /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
#endif

/* Tip: To avoid modifying this file each time you need to switch between these
Expand All @@ -105,11 +111,11 @@
#endif /* USE_HAL_DRIVER */

/**
* @brief CMSIS Device version number V1.1.0
* @brief CMSIS Device version number V1.1.2
*/
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F7_CMSIS_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
Expand All @@ -122,7 +128,15 @@
/** @addtogroup Device_Included
* @{
*/
#if defined(STM32F756xx)
#if defined(STM32F722xx)
#include "stm32f722xx.h"
#elif defined(STM32F723xx)
#include "stm32f723xx.h"
#elif defined(STM32F732xx)
#include "stm32f732xx.h"
#elif defined(STM32F733xx)
#include "stm32f733xx.h"
#elif defined(STM32F756xx)
#include "stm32f756xx.h"
#elif defined(STM32F746xx)
#include "stm32f746xx.h"
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
******************************************************************************
* @file system_stm32f7xx.c
* @author MCD Application Team
* @version V1.0.2
* @date 21-September-2015
* @version V1.1.2
* @date 23-September-2016
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
Expand Down
4 changes: 2 additions & 2 deletions targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.h
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
******************************************************************************
* @file system_stm32f7xx.h
* @author MCD Application Team
* @version V1.1.0
* @date 22-April-2016
* @version V1.1.2
* @date 23-September-2016
* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
******************************************************************************
* @attention
Expand Down
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