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Dev stm32 gpio pins rework #3665

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Merged
merged 12 commits into from
Feb 21, 2017
139 changes: 102 additions & 37 deletions targets/TARGET_STM/PinNamesTypes.h
Original file line number Diff line number Diff line change
Expand Up @@ -36,58 +36,123 @@
extern "C" {
#endif

#define STM_PIN_DATA(MODE, PUPD, AFNUM) ((int)(((MODE & 0x0F) << 0) |\
((PUPD & 0x07) << 4) |\
((AFNUM & 0x0F) << 7)))

#define STM_PIN_DATA_EXT(MODE, PUPD, AFNUM, CHANNEL, INVERTED) ((int)(((MODE & 0x0F) << 0) |\
((PUPD & 0x07) << 4) |\
((AFNUM & 0x0F) << 7) |\
((CHANNEL & 0x1F) << 11) |\
((INVERTED & 0x01) << 16)))

#define STM_PIN_MODE(X) (((X) >> 0) & 0x0F)
#define STM_PIN_PUPD(X) (((X) >> 4) & 0x07)
#define STM_PIN_AFNUM(X) (((X) >> 7) & 0x0F)
#define STM_PIN_CHANNEL(X) (((X) >> 11) & 0x1F)
#define STM_PIN_INVERTED(X) (((X) >> 16) & 0x01)

#define STM_MODE_INPUT (0)
#define STM_MODE_OUTPUT_PP (1)
#define STM_MODE_OUTPUT_OD (2)
#define STM_MODE_AF_PP (3)
#define STM_MODE_AF_OD (4)
#define STM_MODE_ANALOG (5)
#define STM_MODE_IT_RISING (6)
#define STM_MODE_IT_FALLING (7)
#define STM_MODE_IT_RISING_FALLING (8)
#define STM_MODE_EVT_RISING (9)
#define STM_MODE_EVT_FALLING (10)
#define STM_MODE_EVT_RISING_FALLING (11)
#define STM_MODE_IT_EVT_RESET (12)
// The last mode is only valid for specific families, so we put it in the end
#define STM_MODE_ANALOG_ADC_CONTROL (13)
/* STM PIN data as used in pin_function is coded on 32 bits as below
* [2:0] Function (like in MODER reg) : Input / Output / Alt / Analog
* [3] Output Push-Pull / Open Drain (as in OTYPER reg)
* [5:4] as in PUPDR reg: No Pull, Pull-up, Pull-Donc
* [7:6] Reserved for speed config (as in OSPEEDR), but not used yet
* [11:8] Alternate Num (as in AFRL/AFRG reg)
* [16:12] Channel (Analog/Timer specific)
* [17] Inverted (Analog/Timer specific)
* [18] Analog ADC control - Only valid for specific families
* [32:19] Reserved
*/

#define STM_PIN_FUNCTION_MASK 0x07
#define STM_PIN_FUNCTION_SHIFT 0
#define STM_PIN_FUNCTION_BITS (STM_PIN_FUNCTION_MASK << STM_PIN_FUNCTION_SHIFT)

#define STM_PIN_OD_MASK 0x01
#define STM_PIN_OD_SHIFT 3
#define STM_PIN_OD_BITS (STM_PIN_OD_MASK << STM_PIN_OD_SHIFT)

#define STM_PIN_PUPD_MASK 0x03
#define STM_PIN_PUPD_SHIFT 4
#define STM_PIN_PUPD_BITS (STM_PIN_PUPD_MASK << STM_PIN_PUPD_SHIFT)

#define STM_PIN_SPEED_MASK 0x03
#define STM_PIN_SPEED_SHIFT 6
#define STM_PIN_SPEED_BITS (STM_PIN_SPEED_MASK << STM_PIN_SPEED_SHIFT)

#define STM_PIN_AFNUM_MASK 0x0F
#define STM_PIN_AFNUM_SHIFT 8
#define STM_PIN_AFNUM_BITS (STM_PIN_AFNUM_MASK << STM_PIN_AFNUM_SHIFT)

#define STM_PIN_CHAN_MASK 0x1F
#define STM_PIN_CHAN_SHIFT 12
#define STM_PIN_CHANNEL_BIT (STM_PIN_CHAN_MASK << STM_PIN_CHAN_SHIFT)

#define STM_PIN_INV_MASK 0x01
#define STM_PIN_INV_SHIFT 17
#define STM_PIN_INV_BIT (STM_PIN_INV_MASK << STM_PIN_INV_SHIFT)

#define STM_PIN_AN_CTRL_MASK 0x01
#define STM_PIN_AN_CTRL_SHIFT 18
#define STM_PIN_ANALOG_CONTROL_BIT (STM_PIN_AN_CTRL_MASK << STM_PIN_AN_CTRL_SHIFT)

#define STM_PIN_FUNCTION(X) (((X) >> STM_PIN_FUNCTION_SHIFT) & STM_PIN_FUNCTION_MASK)
#define STM_PIN_OD(X) (((X) >> STM_PIN_OD_SHIFT) & STM_PIN_OD_MASK)
#define STM_PIN_PUPD(X) (((X) >> STM_PIN_PUPD_SHIFT) & STM_PIN_PUPD_MASK)
#define STM_PIN_SPEED(X) (((X) >> STM_PIN_SPEED_SHIFT) & STM_PIN_SPEED_MASK)
#define STM_PIN_AFNUM(X) (((X) >> STM_PIN_AFNUM_SHIFT) & STM_PIN_AFNUM_MASK)
#define STM_PIN_CHANNEL(X) (((X) >> STM_PIN_CHAN_SHIFT) & STM_PIN_CHAN_MASK)
#define STM_PIN_INVERTED(X) (((X) >> STM_PIN_INV_SHIFT) & STM_PIN_INV_MASK)
#define STM_PIN_ANALOG_CONTROL(X) (((X) >> STM_PIN_AN_CTRL_SHIFT) & STM_PIN_AN_CTRL_MASK)

#define STM_PIN_DEFINE(FUNC_OD, PUPD, AFNUM) ((int)(FUNC_OD) |\
((PUPD & STM_PIN_PUPD_MASK) << STM_PIN_PUPD_SHIFT) |\
((AFNUM & STM_PIN_AFNUM_MASK) << STM_PIN_AFNUM_SHIFT))

#define STM_PIN_DEFINE_EXT(FUNC_OD, PUPD, AFNUM, CHAN, INV) \
((int)(FUNC_OD) |\
((PUPD & STM_PIN_PUPD_MASK) << STM_PIN_PUPD_SHIFT) |\
((AFNUM & STM_PIN_AFNUM_MASK) << STM_PIN_AFNUM_SHIFT) |\
((CHAN & STM_PIN_CHAN_MASK) << STM_PIN_CHAN_SHIFT) |\
((INV & STM_PIN_INV_MASK) << STM_PIN_INV_SHIFT))

/*
* MACROS to support the legacy definition of PIN formats
* The STM_MODE_ defines contain the function and the Push-pull/OpenDrain
* configuration (legacy inheritance).
*/
#define STM_PIN_DATA(FUNC_OD, PUPD, AFNUM) \
STM_PIN_DEFINE(FUNC_OD, PUPD, AFNUM)
#define STM_PIN_DATA_EXT(FUNC_OD, PUPD, AFNUM, CHANNEL, INVERTED) \
STM_PIN_DEFINE_EXT(FUNC_OD, PUPD, AFNUM, CHANNEL, INVERTED)

typedef enum {
STM_PIN_INPUT = 0,
STM_PIN_OUTPUT = 1,
STM_PIN_ALTERNATE = 2,
STM_PIN_ANALOG = 3,
} StmPinFunction;

#define STM_MODE_INPUT (STM_PIN_INPUT)
#define STM_MODE_OUTPUT_PP (STM_PIN_OUTPUT)
#define STM_MODE_OUTPUT_OD (STM_PIN_OUTPUT | STM_PIN_OD_BITS)
#define STM_MODE_AF_PP (STM_PIN_ALTERNATE)
#define STM_MODE_AF_OD (STM_PIN_ALTERNATE | STM_PIN_OD_BITS)
#define STM_MODE_ANALOG (STM_PIN_ANALOG)
#define STM_MODE_ANALOG_ADC_CONTROL (STM_PIN_ANALOG | STM_PIN_ANALOG_CONTROL_BIT)

// High nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, 6=G, 7=H)
// Low nibble = pin number
#define STM_PORT(X) (((uint32_t)(X) >> 4) & 0xF)
#define STM_PIN(X) ((uint32_t)(X) & 0xF)

/* Defines to be used by application */
typedef enum {
PIN_INPUT,
PIN_INPUT = 0,
PIN_OUTPUT
} PinDirection;

typedef enum {
PullNone = 0,
PullUp = 1,
PullDown = 2,
OpenDrain = 3,
PullDefault = PullNone
PullNone = 0,
PullUp = 1,
PullDown = 2,
OpenDrainPullUp = 3,
OpenDrainNoPull = 4,
OpenDrainPullDown = 5,
PushPullNoPull = PullNone,
PushPullPullUp = PullUp,
PushPullPullDown = PullDown,
OpenDrain = OpenDrainPullUp,
PullDefault = PullNone
} PinMode;

#ifdef __cplusplus
}
#endif

#endif

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