Add bootloader support stm32f439xI

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f439xx.s

@@ -51,7 +51,7 @@ Stack_Size      EQU     0x00000400
                 EXPORT  __initial_sp
 
 Stack_Mem       SPACE   Stack_Size
-__initial_sp    EQU     0x20020000 ; Top of RAM
+__initial_sp    EQU     0x20030000 ; Top of RAM
 
 
 ; <h> Heap Configuration

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/stm32f439xx.sct

@@ -1,3 +1,4 @@
+#! armcc -E
 ; Scatter-Loading Description File
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Copyright (c) 2015, STMicroelectronics
@@ -27,19 +28,30 @@
 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-; 2 MB FLASH (0x200000) + 256 KB SRAM (0x40000)
-LR_IROM1 0x08000000 0x200000  {    ; load region size_region
+#if !defined(MBED_APP_START)
+  #define MBED_APP_START 0x08000000
+#endif
 
-  ER_IROM1 0x08000000 0x200000  {  ; load address = execution address
+#if !defined(MBED_APP_SIZE)
+  #define MBED_APP_SIZE 0x200000
+#endif
+
+; STM32F439xI: 2048 KB FLASH (0x200000) + 256 KB SRAM (0x30000 + 0x10000)
+LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region
+
+  ER_IROM1 MBED_APP_START MBED_APP_SIZE  {  ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
 
-  ; Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM
-  RW_IRAM1 (0x20000000+0x1AC) (0x20000-0x1AC)  {  ; RW data
+  ; Total: 107 vectors = 428 bytes (0x1AC) to be used
+  ; should match ER_IROM1::RESET/4 and cmsis_nvic.h::NVIC_NUM_VECTORS
+  RW_IRAM1 (0x20000000 + (107*4)) (0x30000 - (107*4))  {  ; RW data
    .ANY (+RW +ZI)
   }
-
+  RW_IRAM2 (0x10000000) 0x10000 { 
+   .ANY (+RW +ZI) 
+  }
 }
 

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct

@@ -1,3 +1,4 @@
+#! armcc -E
 ; Scatter-Loading Description File
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Copyright (c) 2015, STMicroelectronics
@@ -27,10 +28,18 @@
 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-; 2 MB FLASH (0x200000) + 192 KB SRAM (0x30000)
-LR_IROM1 0x08000000 0x200000  {    ; load region size_region
+#if !defined(MBED_APP_START)
+  #define MBED_APP_START 0x08000000
+#endif
 
-  ER_IROM1 0x08000000 0x200000  {  ; load address = execution address
+#if !defined(MBED_APP_SIZE)
+  #define MBED_APP_SIZE 0x200000
+#endif
+
+; 2 MB FLASH (0x200000) + 256 KB SRAM (0x30000 + 0x10000)
+LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region
+
+  ER_IROM1 MBED_APP_START MBED_APP_SIZE  {  ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
@@ -40,6 +49,9 @@ LR_IROM1 0x08000000 0x200000  {    ; load region size_region
   RW_IRAM1 (0x20000000+0x1AC) (0x30000-0x1AC)  {  ; RW data
    .ANY (+RW +ZI)
   }
-
+
+  RW_IRAM2 (0x10000000) (0x10000)  {  ; RW data
+   .ANY (+RW +ZI)
+  }
 }
 

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld

@@ -1,7 +1,15 @@
+#if !defined(MBED_APP_START)
+  #define MBED_APP_START 0x08000000
+#endif
+
+#if !defined(MBED_APP_SIZE)
+  #define MBED_APP_SIZE 2048k
+#endif
+
 /* Linker script to configure memory regions. */
 MEMORY
 { 
-  FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048k
+  FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
   CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
   RAM (rwx) : ORIGIN = 0x200001AC, LENGTH = 192k - 0x1AC 
 }

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf

@@ -1,19 +1,21 @@
 /*###ICF### Section handled by ICF editor, don't touch! ****/
 /*-Editor annotation file-*/
 /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
+if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
 /*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
 /*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__    = 0x08000000;
-define symbol __ICFEDIT_region_ROM_end__      = 0x081FFFFF;
+define symbol __ICFEDIT_region_ROM_start__    = MBED_APP_START;
+define symbol __ICFEDIT_region_ROM_end__      = MBED_APP_START + MBED_APP_SIZE - 1;
 define symbol __ICFEDIT_region_NVIC_start__   = 0x20000000;
 define symbol __ICFEDIT_region_NVIC_end__     = 0x200001AF;
 define symbol __ICFEDIT_region_RAM_start__    = 0x200001B0;
 define symbol __ICFEDIT_region_RAM_end__      = 0x2002FFFF;
 define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000;
 define symbol __ICFEDIT_region_CCMRAM_end__   = 0x1000FFFF;
 /*-Sizes-*/
-/*Heap 1/3 of ram and stack 1/8*/
+/*Heap 64kB and stack 24kB */
 define symbol __ICFEDIT_size_cstack__ = 0x6000;
 define symbol __ICFEDIT_size_heap__   = 0x10000;
 /**** End of ICF editor section. ###ICF###*/

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/cmsis_nvic.h

@@ -32,7 +32,7 @@
 #ifndef MBED_CMSIS_NVIC_H
 #define MBED_CMSIS_NVIC_H
 
-// STM32F429ZI
+// STM32F439xI
 // CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
 // MCU Peripherals: 91 vectors = 364 bytes from 0x40 to 0x1AB
 // Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/stm32f4xx.h

@@ -86,12 +86,12 @@
   /* #define STM32F417xx */   /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */
   /* #define STM32F427xx */   /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */
   /* #define STM32F437xx */   /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */
-  /*#define STM32F429xx  */   /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG, 
+  /* #define STM32F429xx */   /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG, 
                                    STM32F439NI, STM32F429IG  and STM32F429II Devices */
-#define STM32F439xx    /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG, 
+  #define STM32F439xx         /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG, 
                                    STM32F439NI, STM32F439IG and STM32F439II Devices */
   /* #define STM32F401xC */   /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */
-  /*  #define STM32F401xE */         /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
+  /* #define STM32F401xE */   /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
   /* #define STM32F410Tx */   /*!< STM32F410T8 and STM32F410TB Devices */
   /* #define STM32F410Cx */   /*!< STM32F410C8 and STM32F410CB Devices */
   /* #define STM32F410Rx */   /*!< STM32F410R8 and STM32F410RB Devices */

targets/targets.json

@@ -908,7 +908,8 @@
         "detect_code": ["0797"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
-        "device_name" : "STM32F439ZI"
+        "device_name" : "STM32F439ZI",
+        "bootloader_supported": true
     },
     "NUCLEO_F446RE": {
         "supported_form_factors": ["ARDUINO", "MORPHO"],