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Update CMSIS-Core and RTX to version 5 #4346

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theotherjimmy
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@theotherjimmy theotherjimmy commented May 18, 2017

Description

Moved from #4294

Main changes made by this PR:

  • Update CMSIS to v5
  • Update CMSIS-RTOS to v2
  • Update RTX to v5
  • Remove NVIC_SetVector and NVIC_GetVector from target code as it's provided by CMSIS
  • Copy interrupt vector table ROM->RAM
  • Rework boot sequence
  • Add RTOS1 compatibility including CMSIS adapter and RTOS1 types for both C and C++ APIs
  • Optimize memory usage in tests
  • Redefine thread/main/isr stack sizes
  • Remove Cortex A and ARM7 support

Status

IN DEVELOPMENT

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Todos

c1728p9 and others added 14 commits May 18, 2017 11:04
Remove the RTOS and CMSIS files in preperation for CMSIS 5. Note that
the RTOS heap ad stack test is left since this is still applicable to
RTX5. This file can be found here:
rtos\rtx\TARGET_CORTEX_M\TESTS\memory\heap_and_stack\main.cpp
Pull in unmodified CMSIS5 files from the repository
https://github.com/ARM-software/CMSIS_5.git from the commit
c1b4232.

The files were copied as shown below with source->dest_dir.
CMSIS_5/CMSIS/Core/Include/core_*.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core_A/Include/core_*.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/DSP/Include/arm_math.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core/Include/tz_context.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h -> mbed-os/cmsis/TARGET_CORTEX_M/
CMSIS_5/CMSIS/Core/Include/cmsis_arm*.h -> mbed-os/cmsis/TARGET_CORTEX_M/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/Core/Include/cmsis_gcc*.h -> mbed-os/cmsis/TARGET_CORTEX_M/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/Core_A/Include/cmsis_compiler.h -> mbed-os/cmsis/TARGET_CORTEX_A/
CMSIS_5/CMSIS/Core_A/Include/cmsis_arm*.h -> mbed-os/cmsis/TARGET_CORTEX_A/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Library/cmsis_os1.c -> mbed-os/rtos/rtx/
CMSIS_5/CMSIS/RTOS2/Include/cmsis_os2.h -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Config/* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Include1/* -> mbed-os/rtos/rtx/
CMSIS_5/CMSIS/RTOS2/RTX/Include/* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/rtx_* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/core_cm.h -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_IAR/
Only set the SVCall priority if uVisor is not present. If uVisor is
present, keep using whatever priorities it has already set up.
Add the OsEventObserver mechanism. A client interested in receiving
notifications on certain OS events can register to receive notifications
with osRegisterForOsEvents. This is useful for clients like the secure
memory allocator, which observes thread switching events in order to
swap in and out different memory allocator objects.
OsEventObserver objects expect a context to be maintained per thread on
their behalf. Add this context to the thread control block and extend
the thread creation functions with the ability to supply a context.
Make changes to the files taken from RTX5/CMSIS5 so they work
with mbed-os and uvisor.
Update all of mbed-os to use RTX5.
Imported from 20170407_v7-M tag, commit e33f2739e961 "Make function in
transition macro match target".
Use a newer version of uVisor that doesn't change the box main thread
function type. Previously, we required all box main thread definitions
to change from taking a `const void *` to a `void *` when moving to
RTX5. We now are backwards compatibile.
to fit into smaller targets
@theotherjimmy theotherjimmy changed the title # Description Moved from #4294 Update CMSIS-Core and RTX to version 5 May 18, 2017
@0xc0170
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0xc0170 commented May 19, 2017

closing, the main one referenced above is still being used.

@0xc0170 0xc0170 closed this May 19, 2017
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5 participants