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Revert "STM32F7: Add bootloader support" #5932

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Jan 25, 2018
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Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,6 @@
**/

#include "stm32f7xx.h"
#include "nvic_addr.h"
#include "mbed_assert.h"

/*!< Uncomment the following line if you need to relocate your vector Table in
Expand Down Expand Up @@ -93,7 +92,7 @@ void SystemInit(void)
#ifdef VECT_TAB_SRAM
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif

}
Expand Down
Original file line number Diff line number Diff line change
@@ -1,4 +1,3 @@
#! armcc -E
; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2016, STMicroelectronics
Expand Down Expand Up @@ -28,18 +27,10 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif

#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x100000
#endif

; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
LR_IROM1 0x08000000 0x100000 { ; load region size_region

ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
Expand Down
Original file line number Diff line number Diff line change
@@ -1,4 +1,3 @@
#! armcc -E
; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2016, STMicroelectronics
Expand Down Expand Up @@ -28,18 +27,10 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif

#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x100000
#endif

; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
LR_IROM1 0x08000000 0x100000 { ; load region size_region

ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
Expand Down
Original file line number Diff line number Diff line change
@@ -1,16 +1,7 @@
/* Linker script to configure memory regions. */

#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif

#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 1024K
#endif

MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
RAM (rwx) : ORIGIN = 0x200001C8, LENGTH = 320K - 0x1C8
}

Expand Down
Original file line number Diff line number Diff line change
@@ -1,10 +1,7 @@
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }

/* [ROM = 1024kb = 0x100000] */
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __intvec_start__ = 0x08000000;
define symbol __region_ROM_start__ = 0x08000000;
define symbol __region_ROM_end__ = 0x080FFFFF;

/* [RAM = 320kb = 0x50000] Vector table dynamic copy: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM */
define symbol __NVIC_start__ = 0x20000000;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,6 @@
**/

#include "stm32f7xx.h"
#include "nvic_addr.h"
#include "mbed_assert.h"

/*!< Uncomment the following line if you need to relocate your vector Table in
Expand Down Expand Up @@ -93,7 +92,7 @@ void SystemInit(void)
#ifdef VECT_TAB_SRAM
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif

}
Expand Down
Original file line number Diff line number Diff line change
@@ -1,4 +1,3 @@
#! armcc -E
; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2016, STMicroelectronics
Expand Down Expand Up @@ -28,18 +27,10 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif

#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x200000
#endif

; STM32F767ZI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
LR_IROM1 0x08000000 0x200000 { ; load region size_region

ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
ER_IROM1 0x08000000 0x200000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
Expand Down
Original file line number Diff line number Diff line change
@@ -1,4 +1,3 @@
#! armcc -E
; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2016, STMicroelectronics
Expand Down Expand Up @@ -28,18 +27,10 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif

#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x200000
#endif

; STM32F767ZI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
LR_IROM1 0x08000000 0x200000 { ; load region size_region

ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
ER_IROM1 0x08000000 0x200000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
Expand Down
Original file line number Diff line number Diff line change
@@ -1,16 +1,7 @@
/* Linker script to configure memory regions. */

#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif

#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 2048K
#endif

MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
RAM (rwx) : ORIGIN = 0x200001F8, LENGTH = 512K - 0x1F8
}

Expand Down
Original file line number Diff line number Diff line change
@@ -1,10 +1,7 @@
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }

/* [ROM = 2048kb = 0x200000] */
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __intvec_start__ = 0x08000000;
define symbol __region_ROM_start__ = 0x08000000;
define symbol __region_ROM_end__ = 0x081FFFFF;

/* [RAM = 512kb = 0x80000] Vector table dynamic copy: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM */
define symbol __NVIC_start__ = 0x20000000;
Expand Down
13 changes: 3 additions & 10 deletions targets/TARGET_STM/mbed_overrides.c
Original file line number Diff line number Diff line change
Expand Up @@ -35,16 +35,9 @@ void mbed_sdk_init()
HAL_Init();

#if TARGET_STM32F7
// The mbed_sdk_init can be called either during cold boot or during
// application boot after bootloader has been executed.
// In case the bootloader has already enabled the cache,
// is is needed to not enable it again.
if (SCB->CCR & (uint32_t)SCB_CCR_IC_Msk == 0) { // If ICache is disabled
SCB_EnableICache();
}
if (SCB->CCR & (uint32_t)SCB_CCR_DC_Msk == 0) { // If DCache is disabled
SCB_EnableDCache();
}
// Enable CPU L1-Cache
SCB_EnableICache();
SCB_EnableDCache();
#endif /* TARGET_STM32F7 */

/* Configure the System clock source, PLL Multiplier and Divider factors,
Expand Down
6 changes: 2 additions & 4 deletions targets/targets.json
Original file line number Diff line number Diff line change
Expand Up @@ -1294,8 +1294,7 @@
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
"features": ["LWIP"],
"release_versions": ["2", "5"],
"device_name": "STM32F746ZG",
"bootloader_supported": true
"device_name": "STM32F746ZG"
},
"NUCLEO_F756ZG": {
"inherits": ["FAMILY_STM32"],
Expand Down Expand Up @@ -1351,8 +1350,7 @@
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
"features": ["LWIP"],
"release_versions": ["2", "5"],
"device_name": "STM32F767ZI",
"bootloader_supported": true
"device_name": "STM32F767ZI"
},
"NUCLEO_L011K4": {
"inherits": ["FAMILY_STM32"],
Expand Down