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merged 2 commits into from Apr 17, 2018
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59 changes: 49 additions & 10 deletions targets/TARGET_Maxim/TARGET_MAX32630/spi_api.c
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,7 @@
*/

#include "mbed_assert.h"
#include "mbed_critical.h"
#include "spi_api.h" // mbed HAL
#include "spim_regs.h" // bare metal
#include "spim.h" // Maxim CMSIS driver
Expand Down Expand Up @@ -167,19 +168,58 @@ int spi_master_write(spi_t *obj, int value)
return *req.rx_data;
}

int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
char *rx_buffer, int rx_length, char write_fill) {
int total = (tx_length > rx_length) ? tx_length : rx_length;
//******************************************************************************
int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill)
{
spim_req_t req;

if (!(tx_length | rx_length) ||
(tx_length < 0) ||
(rx_length < 0)) {
return 0;
}

req.width = SPIM_WIDTH_1;
req.ssel = 0;
req.deass = 1;
req.callback = NULL;

for (int i = 0; i < total; i++) {
char out = (i < tx_length) ? tx_buffer[i] : write_fill;
char in = spi_master_write(obj, out);
if (i < rx_length) {
rx_buffer[i] = in;
core_util_critical_section_enter();
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Why is this in critical section?

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Hardware limitation may cause data corruption if the TX fifo is allowed to run empty. The critical section ensures a transaction will complete without interruption.

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@0xc0170 0xc0170 Apr 13, 2018

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Hardware limitation may cause data corruption if the TX fifo is allowed to run empty. The critical section ensures a transaction will complete without interruption.

these type of details are worth in the commit msg. I imagine coming over and removing it like as the upper layer should take care of synchronization (this is however hw protection)

if (tx_length == rx_length) {
req.tx_data = (uint8_t *)tx_buffer;
req.rx_data = (uint8_t *)rx_buffer;
req.len = tx_length;
SPIM_Trans(obj->spi, &req);
} else if (tx_length < rx_length) {
req.tx_data = (tx_length > 0) ? (uint8_t *)tx_buffer : NULL;
req.rx_data = (uint8_t *)rx_buffer;
req.len = (tx_length > 0) ? tx_length : rx_length;
SPIM_Trans(obj->spi, &req);

if (tx_length) {
req.tx_data = NULL;
req.rx_data = (uint8_t *)(rx_buffer + tx_length);
req.len = rx_length - tx_length;
SPIM_Trans(obj->spi, &req);
}
} else {
req.tx_data = (uint8_t *)tx_buffer;
req.rx_data = (rx_length > 0) ? (uint8_t *)rx_buffer : NULL;
req.len = (rx_length > 0) ? rx_length : tx_length;
SPIM_Trans(obj->spi, &req);

if (rx_length) {
req.tx_data = (uint8_t *)(tx_buffer + rx_length);
req.rx_data = NULL;
req.len = tx_length - rx_length;
SPIM_Trans(obj->spi, &req);
}
}
core_util_critical_section_exit();

while (SPIM_Busy(obj->spi));

return total;
return tx_length > rx_length ? tx_length : rx_length;
}

//******************************************************************************
Expand All @@ -193,4 +233,3 @@ uint8_t spi_get_module(spi_t *obj)
{
return obj->index;
}