STM32 : PeripheralPins.c and PinNames.h files alignment #6931

jeromecoutant · 2018-05-16T15:10:14Z

Description

All STM32 PeripheralPins.c and PinNames.h files are now aligned

Script from #6929 has been applied for only (but all) NUCLEO and DISCO boards.

Regression tests are green on my side.

Pull request type

[ ] Fix
[X] Refactor
[ ] New target
[ ] Feature
[ ] Breaking change

bcostm

Looks great! Thanks.
I tried to check all files and found some issues below. Seems also that QSPI pins are missing ?

bcostm · 2018-05-16T15:35:48Z

targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/PeripheralPins.c

-//  {PA_14, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, // SWCLK
-    {PB_6,  UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
-    {NC,    NC,     0}
+    {PA_2,       UART_1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, // Connected to STDIO_UART_TX


Humm no PA_1 now. Can you double check with datasheet ?

Checked: no UART_TX PA_1

bcostm · 2018-05-17T05:26:09Z

targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/PeripheralPins.c

+    {PA_2,       UART_2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_TX
+    {PA_9,       UART_1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+//  {PA_14,      UART_2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to SWCLK
+    {PB_3,       UART_2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to SWO


We don't comment pins connected to SWO?

After discussion, we will not comment SWO pin,
and I need to remove comment for SWCLK

bcostm · 2018-05-17T05:33:02Z

targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303RE/PinNames.h

    USB_DM = PA_11,
    USB_DP = PA_12,

+/**** No ETHERNET pins ***/


Maybe remove these comments when there are no pins ?

bcostm · 2018-05-17T05:39:56Z

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PeripheralPins.c

 #ifdef MBED_CONF_TARGET_STDIO_UART_TX
-    {PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2,  0)}, // ADC1_IN2
+    {PA_2,       ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 // Connected to STDIO_UART_TX


Why these pins are not commented ? It looks like this file has not been well processed by the script ? The warning above about the STDIO pins is also different.

There is a specific case for the NUCLEO_F401RE...
I have implemented the MBED_CONF_TARGET_STDIO_UART_TX switch ifdef before proposing the WEAK feature.
I think I can't remove this now.

bcostm · 2018-05-17T06:33:37Z

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PeripheralPins.c

+    {PB_15,      SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
+    {PC_3,       SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
+    {PC_12,      SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
+    {PD_6,       SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},


it is GPIO_AF5_SPI3

bcostm · 2018-05-17T11:24:25Z

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralPins.c

+    {PE_12,      SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to D9 [D9_IS66WV51216EBLL]
+    {PG_5,       SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to PSRAM_A15 [A15_IS66WV51216EBLL]
+    {PG_12,      SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to UART1_RTS [STMOD+_UART]
+    {PI_0,     


All QSPI pins have disappeared.

Yes, as QSPI is not in master yet

genpinmap script version 1.1

jeromecoutant · 2018-05-17T16:01:13Z

Thx @bcostm for the review

Updates have been pushed : b30f3ab

cmonr · 2018-05-21T15:47:47Z

/morph build

mbed-ci · 2018-05-21T19:08:30Z

Build : SUCCESS

Build number : 2085
Build artifacts/logs : http://mbed-os.s3-website-eu-west-1.amazonaws.com/?prefix=builds/6931/

Triggering tests

/morph test
/morph uvisor-test
/morph export-build
/morph mbed2-build

mbed-ci · 2018-05-21T23:20:43Z

Test : SUCCESS

Build number : 1896
Test logs :http://mbed-os-logs.s3-website-us-west-1.amazonaws.com/?prefix=logs/6931/1896

mbed-ci · 2018-05-22T01:39:56Z

Exporter Build : SUCCESS

Build number : 1729
Build artifacts/logs : http://mbed-os.s3-website-eu-west-1.amazonaws.com/?prefix=builds/exporter/6931/

This issue is start on ARMmbed#6931 ADC pins must need STM_PIN_ANALOG_CONTROL_BIT to call LL_GPIO_EnablePinAnalogControl

This issue is start on #6931 ADC pins must need STM_PIN_ANALOG_CONTROL_BIT to call LL_GPIO_EnablePinAnalogControl

This issue is start on ARMmbed#6931 ADC pins must need STM_PIN_ANALOG_CONTROL_BIT to call LL_GPIO_EnablePinAnalogControl

jeromecoutant added 16 commits May 15, 2018 14:50

STM32F0 NUCLEO : PeripheralPins.c and PinNames.h files alignment

0e510cf

STM32F1 NUCLEO : PeripheralPins.c and PinNames.h files alignment

0025ebc

STM32F2 NUCLEO : PeripheralPins.c and PinNames.h files alignment

4ebbcc2

STM32F3 NUCLEO : PeripheralPins.c and PinNames.h files alignment

817bdc2

STM32F4 NUCLEO : PeripheralPins.c and PinNames.h files alignment

bcadeff

STM32F7 NUCLEO : PeripheralPins.c and PinNames.h files alignment

d0da6dd

STM32L0 NUCLEO : PeripheralPins.c and PinNames.h files alignment

b308d5c

STM32L1 NUCLEO : PeripheralPins.c and PinNames.h files alignment

945bf78

STM32L4 NUCLEO : PeripheralPins.c and PinNames.h files alignment

3e92ff1

STM32F0 DISCO : PeripheralPins.c and PinNames.h files alignment

b22c0d1

STM32F1 DISCO : PeripheralPins.c and PinNames.h files alignment

1e0ae6d

STM32F3 DISCO : PeripheralPins.c and PinNames.h files alignment

02e8172

STM32F4 DISCO : PeripheralPins.c and PinNames.h files alignment

2b9b817

STM32F7 DISCO : PeripheralPins.c and PinNames.h files alignment

b928439

STM32L0 DISCO : PeripheralPins.c and PinNames.h files alignment

3e56a68

STM32L4 DISCO : PeripheralPins.c and PinNames.h files alignment

3ac1855

cmonr added the needs: review label May 16, 2018

bcostm reviewed May 17, 2018

View reviewed changes

0xc0170 added needs: work and removed needs: review labels May 17, 2018

STM32 PeripheralPins.c second update after review

b30f3ab

genpinmap script version 1.1

bcostm approved these changes May 18, 2018

View reviewed changes

cmonr added needs: review and removed needs: work labels May 21, 2018

cmonr approved these changes May 21, 2018

View reviewed changes

cmonr added needs: CI release-version: 5.8.6 and removed needs: review labels May 21, 2018

0xc0170 added ready for merge and removed needs: CI labels May 22, 2018

cmonr merged commit 3bcc076 into ARMmbed:master May 22, 2018

cmonr removed the ready for merge label May 22, 2018

jeromecoutant deleted the PR_PERIPH branch May 23, 2018 07:17

jeromecoutant mentioned this pull request May 30, 2018

DISCO_F413ZH : map SPI3 to WIFI module #7062

Merged

kevinong0108 added a commit to kevinong0108/mbed-os that referenced this pull request Jan 9, 2019

STM32L476VG: fix wrong pin map function on ADC channels

d3dfc98

This issue is start on ARMmbed#6931 ADC pins must need STM_PIN_ANALOG_CONTROL_BIT to call LL_GPIO_EnablePinAnalogControl

kevinong0108 mentioned this pull request Jan 9, 2019

STM32L476VG: fix wrong pin map function on ADC channels #9313

Merged

adbridge pushed a commit that referenced this pull request Jan 14, 2019

STM32L476VG: fix wrong pin map function on ADC channels

3c03d70

This issue is start on #6931 ADC pins must need STM_PIN_ANALOG_CONTROL_BIT to call LL_GPIO_EnablePinAnalogControl

yossi2le pushed a commit to yossi2le/mbed-os that referenced this pull request Jan 24, 2019

STM32L476VG: fix wrong pin map function on ADC channels

63df94d

This issue is start on ARMmbed#6931 ADC pins must need STM_PIN_ANALOG_CONTROL_BIT to call LL_GPIO_EnablePinAnalogControl

STM32 : PeripheralPins.c and PinNames.h files alignment #6931

STM32 : PeripheralPins.c and PinNames.h files alignment #6931

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jeromecoutant commented May 16, 2018

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jeromecoutant commented May 17, 2018

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cmonr commented May 21, 2018

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mbed-ci commented May 21, 2018

Triggering tests

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mbed-ci commented May 21, 2018

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mbed-ci commented May 22, 2018

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bcostm May 16, 2018 •

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