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[RZ_A1H]Fixed a bug of CMSIS-RTOS RTX for Cortex-A9 #700

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Merged
merged 1 commit into from
Nov 14, 2014
Merged

[RZ_A1H]Fixed a bug of CMSIS-RTOS RTX for Cortex-A9 #700

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4 changes: 2 additions & 2 deletions libraries/rtos/rtx/TARGET_CORTEX_A/rt_HAL_CA.h
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Original file line number Diff line number Diff line change
Expand Up @@ -108,7 +108,7 @@ extern const U32 GICInterface_BASE;

/* HW initialization needs to be done in os_tick_init (void) -RTX_Conf_CM.c-
* OS_X_INIT enables the IRQ n in the GIC */
#define OS_X_INIT(n) char *reg; \
#define OS_X_INIT(n) volatile char *reg; \
reg = (char *)(&GICD_ICDIPR0 + n / 4); \
reg += n % 4; \
*reg = (char)0xff; \
Expand Down Expand Up @@ -163,7 +163,7 @@ __inline static void rt_systick_init (void) {

__inline static void rt_svc_init (void) {
/* Register pendSV - through SGI */
char *reg;
volatile char *reg;

reg = (char *)(&GICD_ICDIPR0 + SGI_PENDSV/4);
reg += SGI_PENDSV % 4;
Expand Down