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STM32 USB fixes #7322

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Merged
merged 5 commits into from
Jul 2, 2018
Merged

STM32 USB fixes #7322

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0ba1560
Revert "Create HAL_PCD_EP_Abort"
c1728p9 Jun 24, 2018
9fba016
Alternate implementation of HAL_PCD_EP_Abort
c1728p9 Jun 25, 2018
b959913
Implement endpoint_abort for STM32
c1728p9 Jun 25, 2018
c9bb527
Fix ST test failures due to endpoint reconfiguration
c1728p9 Jun 25, 2018
f689303
Remove OR from ST endpoint activation
c1728p9 Jun 25, 2018
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133 changes: 105 additions & 28 deletions targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c
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Original file line number Diff line number Diff line change
Expand Up @@ -104,6 +104,7 @@
* @{
*/
static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum);
static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd);
/**
* @}
*/
Expand Down Expand Up @@ -314,7 +315,6 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
uint32_t i = 0U, ep_intr = 0U, epint = 0U, epnum = 0U;
uint32_t fifoemptymsk = 0U, temp = 0U;
USB_OTG_EPTypeDef *ep;
uint32_t hclk = 120000000U;

/* ensure that we are in device mode */
Expand Down Expand Up @@ -366,6 +366,11 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
}
}

if (( epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD)
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD);
}

if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP)
{
/* Inform the upper layer that a setup packet is available */
Expand Down Expand Up @@ -596,27 +601,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/* Handle RxQLevel Interrupt */
if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
{
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);

temp = USBx->GRXSTSP;

ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];

if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT)
{
if((temp & USB_OTG_GRXSTSP_BCNT) != 0U)
{
USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U);
ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
}
}
else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT)
{
USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
}
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
PCD_ReadRxFifo(hpcd);
}

/* Handle SOF Interrupt */
Expand Down Expand Up @@ -1042,26 +1027,82 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
return HAL_OK;
}

/**
* @brief Abort a transaction.
* @param hpcd: PCD handle
* @param ep_addr: endpoint address
* @param pBuf: pointer to the transmission buffer
* @param len: amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
HAL_StatusTypeDef ret;
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
HAL_StatusTypeDef ret = HAL_OK;
USB_OTG_EPTypeDef *ep;

ep = &hpcd->IN_ep[ep_addr & 0x7F];
if ((0x80 & ep_addr) == 0x80)
{
ep = &hpcd->IN_ep[ep_addr & 0x7F];
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
}

/*setup and start the Xfer */
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
ret = USB_EPStopXfer(hpcd->Instance , ep, hpcd->Init.dma_enable);

ep->num = ep_addr & 0x7F;
ep->is_in = ((ep_addr & 0x80) == 0x80);

USB_EPSetNak(hpcd->Instance, ep);

if ((0x80 & ep_addr) == 0x80)
{
ret = USB_EPStopXfer(hpcd->Instance , ep);
if (ret == HAL_OK)
{
ret = USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F);
}
}
else
{
/* Set global NAK */
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK;

/* Read all entries from the fifo so global NAK takes effect */
while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
{
PCD_ReadRxFifo(hpcd);
}

/* Stop the transfer */
ret = USB_EPStopXfer(hpcd->Instance , ep);
if (ret == HAL_BUSY)
{
/* If USB_EPStopXfer returns HAL_BUSY then a setup packet
* arrived after the rx fifo was processed but before USB_EPStopXfer
* was called. Process the rx fifo one more time to read the
* setup packet.
*
* Note - after the setup packet has been received no further
* packets will be received over USB. This is because the next
* phase (data or status) of the control transfer started by
* the setup packet will be naked until global nak is cleared.
*/
while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
{
PCD_ReadRxFifo(hpcd);
}

ret = USB_EPStopXfer(hpcd->Instance , ep);
}

/* Clear global nak */
USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK;
}

__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);

return ret;
}

Expand Down Expand Up @@ -1278,6 +1319,42 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t
return HAL_OK;
}

/**
* @brief Process the next RX fifo entry
* @param hpcd: PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd)
{
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
USB_OTG_EPTypeDef *ep;
uint32_t temp = 0;

USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);

temp = USBx->GRXSTSP;

ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];

if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT)
{
if((temp & USB_OTG_GRXSTSP_BCNT) != 0U)
{
USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U);
ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
}
}
else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT)
{
USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
}
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);

return HAL_OK;
}

/**
* @}
*/
Expand Down
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