New target future sequana

features/FEATURE_BLE/targets/TARGET_Cypress/TARGET_CY8C63XX/Psoc6BLE.cpp

@@ -0,0 +1,117 @@
+/*
+ * mbed Microcontroller Library
+ * Copyright (c) 2017-2017 ARM Limited
+ * Copyright (c) 2017-2018 Future Electronics
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "hci_api.h"
+#include "bstream.h"
+#include "driver/CordioHCIDriver.h"
+#include "drivers/IPCPipeTransportDriver.h"
+#include "psoc6_utils.h"
+
+using namespace ble::vendor::cordio;
+using namespace ble::vendor::cypress;
+
+const uint16_t HCI_VEND_SET_BD_ADDR = 0xfda0;
+const uint8_t  HCI_VEND_SET_BD_ADDR_LEN = 7; /* MAC address + address type */
+
+class Psoc6HCIDriver : public CordioHCIDriver
+{
+public:
+    Psoc6HCIDriver(IPCPipeTransportDriver& transport_driver) :
+        CordioHCIDriver(transport_driver)
+    {
+    }
+
+
+private:
+
+    struct BdAddress {
+        uint8_t mac_address[6];
+        uint8_t addr_type;
+
+        BdAddress() : addr_type(0) {}
+    };
+
+    /**
+     * Initialize the chip.
+     * The transport is up at that time.
+     */
+    virtual void do_initialize();
+
+    /**
+     * Terminate the driver
+     */
+    virtual void do_terminate() {}
+
+    virtual void handle_reset_sequence(uint8_t *pMsg);
+
+private:
+    BdAddress   bd_address;
+};
+
+
+void Psoc6HCIDriver::do_initialize()
+{
+    cy_get_bd_mac_address(bd_address.mac_address);
+}
+
+
+void Psoc6HCIDriver::handle_reset_sequence(uint8_t *pMsg) {
+
+    uint16_t       opcode;
+
+    /* if event is a command complete event */
+    if (*pMsg == HCI_CMD_CMPL_EVT) {
+        /* parse parameters */
+        uint8_t *pMsg2 = pMsg + HCI_EVT_HDR_LEN;
+        pMsg2++;                  /* skip num packets */
+        BSTREAM_TO_UINT16(opcode, pMsg2);
+        pMsg2 -= 2;
+        /* decode opcode */
+        switch (opcode) {
+            case HCI_OPCODE_RESET:
+                /* send next command in sequence */
+                HciVendorSpecificCmd(HCI_VEND_SET_BD_ADDR,
+                                     HCI_VEND_SET_BD_ADDR_LEN,
+                                     reinterpret_cast<uint8_t*>(&bd_address));
+                break;
+
+            case HCI_VEND_SET_BD_ADDR:
+                /* pretend we have just completed reset */
+                UINT16_TO_BSTREAM(pMsg2, HCI_OPCODE_RESET);
+                CordioHCIDriver::handle_reset_sequence(pMsg);
+                break;
+
+            default:
+                /* pass to parent */
+                CordioHCIDriver::handle_reset_sequence(pMsg);
+        }
+    }
+}
+
+
+CordioHCIDriver& ble_cordio_get_hci_driver() {
+    static IPCPipeTransportDriver transport_driver;
+
+    static Psoc6HCIDriver hci_driver(
+        transport_driver /* other hci driver parameters */
+    );
+
+    return hci_driver;
+}
+
+

features/FEATURE_BLE/targets/TARGET_Cypress/TARGET_CY8C63XX/drivers/IPCPipeTransportDriver.cpp

@@ -0,0 +1,75 @@
+/*
+ * mbed Microcontroller Library
+ * Copyright (c) 2017-2017 ARM Limited
+ * Copyright (c) 2017-2018 Future Electronics
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "IPCPipeTransportDriver.h"
+#include "ipcpipe_transport.h"
+#include "mbed_assert.h"
+#include "mbed_error.h"
+
+namespace ble {
+namespace vendor {
+namespace cypress {
+
+
+void dump_buffer(uint8_t *buffer, uint32_t len)
+{
+
+    while (len > 0) {
+        printf(" %02x", *buffer++);
+        --len;
+    }
+    printf("\n");
+}
+
+void ipc_h4_receive(uint32_t *ptr)
+{
+    IpcPipeMessage *message = (IpcPipeMessage *)ptr;
+
+    // We don't expect header to be received from M0+ core.
+    MBED_ASSERT(message->header_length == 0);
+
+//    printf("BLE received: ");
+//    h4_dump_buffer(buffer->message.data, buffer->message.length);
+    cordio::CordioHCITransportDriver::on_data_received(message->data, message->data_length);
+}
+
+IPCPipeTransportDriver::IPCPipeTransportDriver()
+{ }
+
+void IPCPipeTransportDriver::initialize()
+{
+//    printf("H4 Transport driver initialization.\n");
+    ipcpipe_transport_start(IPCPIPE_CLIENT_H4, ipc_h4_receive, NULL);
+}
+
+void IPCPipeTransportDriver::terminate()
+{
+    ipcpipe_transport_stop(IPCPIPE_CLIENT_H4);
+}
+
+uint16_t IPCPipeTransportDriver::write(uint8_t type, uint16_t len, uint8_t *pData)
+{
+//    printf("BLE sending T<%02x>:", type);
+//    dump_buffer(pData, len);
+    ipcpipe_write_data(IPCPIPE_CLIENT_H4, &type, 1, pData, len);
+    return len;
+}
+
+} // namespace cypress
+} // namespace vendor
+} // namespace ble

features/FEATURE_BLE/targets/TARGET_Cypress/TARGET_CY8C63XX/drivers/IPCPipeTransportDriver.h

@@ -0,0 +1,72 @@
+/*
+ * mbed Microcontroller Library
+ * Copyright (c) 2017-2017 ARM Limited
+ * Copyright (c) 2017-2018 Future Electronics
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef PSOC6_IPCPIPE_TRANSPORT_DRIVER_H_
+#define PSOC6_IPCPIPE_TRANSPORT_DRIVER_H_
+
+#include <stdint.h>
+#include "mbed.h"
+#include "CordioHCITransportDriver.h"
+
+
+namespace ble {
+namespace vendor {
+namespace cypress {
+
+using namespace ble::vendor;
+
+/**
+ * Implementation of the H4 driver over PSoC6 IPC pipe.
+ */
+class IPCPipeTransportDriver : public cordio::CordioHCITransportDriver {
+public:
+    /**
+     * Initialize the transport driver.
+     *
+     */
+    IPCPipeTransportDriver();
+
+    /**
+     * Destructor
+     */
+    virtual ~IPCPipeTransportDriver() { }
+
+    /**
+     * @see CordioHCITransportDriver::initialize
+     */
+    virtual void initialize();
+
+    /**
+     * @see CordioHCITransportDriver::terminate
+     */
+    virtual void terminate();
+
+    /**
+     * @see CordioHCITransportDriver::write
+     */
+    virtual uint16_t write(uint8_t type, uint16_t len, uint8_t *pData);
+
+private:
+
+};
+
+} // namespace cypress
+} // namespace vendor
+} // namespace ble
+
+#endif /* PSOC6_IPCPIPE_TRANSPORT_DRIVER_H_ */

features/storage/nvstore/mbed_lib.json

@@ -27,5 +27,19 @@
             "macro_name": "NVSTORE_AREA_2_SIZE",
             "help": "Area 2 size"
         }
+	},
+    "target_overrides": {
+        "FUTURE_SEQUANA": {
+            "area_1_address": "0x100F8000",
+            "area_1_size": 16384,
+            "area_2_address": "0x100FC000",
+            "area_2_size": 16384
+        },
+		"FUTURE_SEQUANA_M0": {
+            "area_1_address": "0x10078000",
+            "area_1_size": 16384,
+            "area_2_address": "0x1007C000",
+            "area_2_size": 16384
+        }
     }
 }

targets/TARGET_Cypress/TARGET_PSOC6/PeripheralNames.h

@@ -0,0 +1,109 @@
+/*
+ * mbed Microcontroller Library
+ * Copyright (c) 2017-2018 Future Electronics
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "cmsis.h"
+#include "PinNames.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    UART_0 = (int)SCB0_BASE,
+    UART_1 = (int)SCB1_BASE,
+    UART_2 = (int)SCB2_BASE,
+    UART_3 = (int)SCB3_BASE,
+    UART_4 = (int)SCB4_BASE,
+    UART_5 = (int)SCB5_BASE,
+    UART_6 = (int)SCB6_BASE,
+    UART_7 = (int)SCB7_BASE,
+} UARTName;
+
+
+typedef enum {
+    SPI_0 = (int)SCB0_BASE,
+    SPI_1 = (int)SCB1_BASE,
+    SPI_2 = (int)SCB2_BASE,
+    SPI_3 = (int)SCB3_BASE,
+    SPI_4 = (int)SCB4_BASE,
+    SPI_5 = (int)SCB5_BASE,
+    SPI_6 = (int)SCB6_BASE,
+    SPI_7 = (int)SCB7_BASE,
+} SPIName;
+
+typedef enum {
+    I2C_0 = (int)SCB0_BASE,
+    I2C_1 = (int)SCB1_BASE,
+    I2C_2 = (int)SCB2_BASE,
+    I2C_3 = (int)SCB3_BASE,
+    I2C_4 = (int)SCB4_BASE,
+    I2C_5 = (int)SCB5_BASE,
+    I2C_6 = (int)SCB6_BASE,
+    I2C_7 = (int)SCB7_BASE,
+} I2CName;
+
+typedef enum {
+    PWM_32b_0 = TCPWM0_BASE,
+    PWM_32b_1,
+    PWM_32b_2,
+    PWM_32b_3,
+    PWM_32b_4,
+    PWM_32b_5,
+    PWM_32b_6,
+    PWM_32b_7,
+    PWM_16b_0 = TCPWM1_BASE,
+    PWM_16b_1,
+    PWM_16b_2,
+    PWM_16b_3,
+    PWM_16b_4,
+    PWM_16b_5,
+    PWM_16b_6,
+    PWM_16b_7,
+    PWM_16b_8,
+    PWM_16b_9,
+    PWM_16b_10,
+    PWM_16b_11,
+    PWM_16b_12,
+    PWM_16b_13,
+    PWM_16b_14,
+    PWM_16b_15,
+    PWM_16b_16,
+    PWM_16b_17,
+    PWM_16b_18,
+    PWM_16b_19,
+    PWM_16b_20,
+    PWM_16b_21,
+    PWM_16b_22,
+    PWM_16b_23,
+} PWMName;
+
+typedef enum {
+    ADC_0 = (int)SAR_BASE,
+} ADCName;
+
+typedef enum {
+    DAC_0 = (int)CTDAC0_BASE,
+} DACName;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif