Skip to content

SPIF - Fix command to unlock Global Block-Protection register #9408

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Jan 23, 2019
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Original file line number Diff line number Diff line change
Expand Up @@ -95,6 +95,7 @@ enum qspif_default_instructions {
QSPIF_RSTEN = 0x66, // Reset Enable
QSPIF_RST = 0x99, // Reset
QSPIF_RDID = 0x9f, // Read Manufacturer and JDEC Device ID
QSPIF_ULBPR = 0x98, // Clears all write-protection bits in the Block-Protection register
};

// Local Function
Expand Down Expand Up @@ -204,9 +205,9 @@ int QSPIFBlockDevice::init()
switch (vendor_device_ids[0]) {
case 0xbf:
// SST devices come preset with block protection
// enabled for some regions, issue write disable instruction to clear
// enabled for some regions, issue global protection unlock to clear
_set_write_enable();
_qspi_send_general_command(QSPIF_WRDI, QSPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
_qspi_send_general_command(QSPIF_ULBPR, QSPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
break;
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,7 @@ enum ops {
SPIF_WRDI = 0x04, // Write Disable
SPIF_RDSR = 0x05, // Read Status Register
SPIF_RDID = 0x9f, // Read Manufacturer and JDEC Device ID
SPIF_ULBPR = 0x98, // Clears all write-protection bits in the Block-Protection register
};

// Status register from RDSR
Expand All @@ -66,9 +67,9 @@ int SPIFReducedBlockDevice::init()
switch (id[0]) {
case 0xbf:
// SST devices come preset with block protection
// enabled for some regions, issue gbpu instruction to clear
// enabled for some regions, issue global protection unlock to clear
_wren();
_cmdwrite(0x98, 0, 0, 0x0, NULL);
_cmdwrite(SPIF_ULBPR, 0, 0, 0x0, NULL);
break;
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -88,6 +88,7 @@ enum spif_default_instructions {
SPIF_RSTEN = 0x66, // Reset Enable
SPIF_RST = 0x99, // Reset
SPIF_RDID = 0x9f, // Read Manufacturer and JDEC Device ID
SPIF_ULBPR = 0x98, // Clears all write-protection bits in the Block-Protection register
};

// Mutex is used for some SPI Driver commands that must be done sequentially with no other commands in between
Expand Down Expand Up @@ -167,9 +168,9 @@ int SPIFBlockDevice::init()
switch (vendor_device_ids[0]) {
case 0xbf:
// SST devices come preset with block protection
// enabled for some regions, issue write disable instruction to clear
// enabled for some regions, issue global protection unlock to clear
_set_write_enable();
_spi_send_general_command(SPIF_WRDI, SPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
_spi_send_general_command(SPIF_ULBPR, SPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
break;
}

Expand Down