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Update XMOS xcore.ai port to be compatible with v11.x #1096

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Merged
merged 6 commits into from
Jun 27, 2024
Merged

Update XMOS xcore.ai port to be compatible with v11.x #1096

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47e47e7
Fix kexcept function
ACascarino Jun 19, 2024
50958c1
Create dummy pxCurrentTCBs for xcore.ai port
ACascarino Jun 19, 2024
da14835
Additional commentary
ACascarino Jun 19, 2024
01b64f5
Add a layer of indirection to cope with singlecore
ACascarino Jun 20, 2024
fbc3a7a
Merge branch 'main' into xmos_fix_freertos_port
ACascarino Jun 26, 2024
a0cca63
Clarify use of _DoException
ACascarino Jun 27, 2024
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35 changes: 33 additions & 2 deletions portable/ThirdParty/xClang/XCOREAI/port.c
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Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,15 @@ static hwtimer_t xKernelTimer;

uint32_t ulPortYieldRequired[ portMAX_CORE_COUNT ] = { pdFALSE };

/* When this port was designed, it was assumed that pxCurrentTCBs would always
exist and that it would always be an array containing pointers to the current
TCBs for each core. In v11, this is not the case; if we are only running one
core, the symbol is pxCurrentTCB instead. Therefore, this port adds a layer
of indirection - we populate this pointer-to-pointer in the RTOS kernel entry
function below. This makes this port agnostic to whether it is running on SMP
or singlecore RTOS. */
void ** xcorePvtTCBContainer;

/*-----------------------------------------------------------*/

void vIntercoreInterruptISR( void )
Expand Down Expand Up @@ -140,15 +149,37 @@ DEFINE_RTOS_KERNEL_ENTRY( void, vPortStartSchedulerOnCore, void )
}
#endif

/* Populate the TCBContainer depending on whether we're singlecore or SMP */
#if ( configNUMBER_OF_CORES == 1 )
{
asm volatile (
"ldaw %0, dp[pxCurrentTCB]\n\t"
: "=r"(xcorePvtTCBContainer)
: /* no inputs */
: /* no clobbers */
);
}
#else
{
asm volatile (
"ldaw %0, dp[pxCurrentTCBs]\n\t"
: "=r"(xcorePvtTCBContainer)
: /* no inputs */
: /* no clobbers */
);
}

#endif

debug_printf( "FreeRTOS Core %d initialized\n", xCoreID );

/*
* Restore the context of the first thread
* to run and jump into it.
*/
asm volatile (
"mov r6, %0\n\t" /* R6 must be the FreeRTOS core ID*/
"ldaw r5, dp[pxCurrentTCBs]\n\t" /* R5 must be the TCB list which is indexed by R6 */
"mov r6, %0\n\t" /* R6 must be the FreeRTOS core ID. In singlecore this is always 0. */
"ldw r5, dp[xcorePvtTCBContainer]\n\t" /* R5 must be the TCB list which is indexed by R6 */
"bu _freertos_restore_ctx\n\t"
: /* no outputs */
: "r" ( xCoreID )
Expand Down
8 changes: 2 additions & 6 deletions portable/ThirdParty/xClang/XCOREAI/portasm.S
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Expand Up @@ -14,11 +14,7 @@ rest of the ISR callback functions. */
.issue_mode dual
.cc_top kexcept.function, kexcept
kexcept:
ldc r11, 0x0008
shl r11, r11, 16
ldc r9, 0x0080
or r11, r11, r9
bau r11 //_TrapHandler is at 0x00080080. TODO: Is it always? Why can't I access the symbol _TrapHandler?
bu _DoException
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@AniruddhaKanhere AniruddhaKanhere Jun 26, 2024 •
edited
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I am not sure what this change is doing - can you please clarify this for me?

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@ACascarino ACascarino Jun 27, 2024 •
edited
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Hi @AniruddhaKanhere - this is a symbol that is generated by our toolchain on compilation. There are a couple of these which are automatically built into every xcore.ai executable to bring up the processor, set execution modes on each core, and provide routines for graceful exception handling (such as _DoException, which disables all events and interrupts and leaves the processor in a state in which an external debugger may connect and query the processor state at time of exception). Therefore, while it would not be expected to find this symbol defined in any application code, it will always be present in the final executable. _TrapHandler, referenced in commentary in the previous implementation, is also one such symbol - it is usually the initial symbol used as the kernel exception pointer and sets up the necessary processor state to then branch to _DoException. Due to the alignment of kexcept, this state has already been achieved by the time kexcept gets here, and so there is no need to go via the _TrapHandler symbol.

The previous implementation assumed that _TrapHandler always existed at 0x80080 - it is not visible to the assembler, and it is therefore required that the address be hard-coded if trying to jump to it. This assumption was not true in certain cases. _DoException, which is visible to the assembler, is therefore an appropriate symbol to jump to and a better choice in all circumstances.

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I've also added commentary to clarify this inline! :)


_yield:
{set sp, r4 /* Restore the task's SP to save the rest of its context. */
Expand Down Expand Up @@ -123,7 +119,7 @@ _yield_continue:
ldaw r11, sp[37]}
vstc r11[0]
#endif
ldaw r5, dp[pxCurrentTCBs] /* Get the current TCB array into r5. */
ldw r5, dp[xcorePvtTCBContainer]
ldw r1, r5[r0] /* Get this core's current TCB pointer into r1. */
stw r4, r1[0x0] /* Save the current task's SP to the first */
/* word (top of stack) in the current TCB. */
Expand Down
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