Merged main:b8b4ee6b4507 into amd-gfx:d15fa08abe6d

Local branch amd-gfx d15fa08 Merged main:d230bf3fce6d into amd-gfx:da5edb4170fd
Remote branch main b8b4ee6 [Support] Add [[nodiscard]] (NFC)

Author: SC llvm team

llvm/include/llvm/Config/llvm-config.h.cmake

@@ -16,7 +16,7 @@
 
 /* Indicate that this is LLVM compiled from the amd-gfx branch. */
 #define LLVM_HAVE_BRANCH_AMD_GFX
-#define LLVM_MAIN_REVISION 475719
+#define LLVM_MAIN_REVISION 475721
 
 /* Define if LLVM_ENABLE_DUMP is enabled */
 #cmakedefine LLVM_ENABLE_DUMP

llvm/include/llvm/Support/Endian.h

@@ -46,21 +46,21 @@ constexpr endianness system_endianness() {
 }
 
 template <typename value_type>
-inline value_type byte_swap(value_type value, endianness endian) {
+[[nodiscard]] inline value_type byte_swap(value_type value, endianness endian) {
   if ((endian != native) && (endian != system_endianness()))
     sys::swapByteOrder(value);
   return value;
 }
 
 /// Swap the bytes of value to match the given endianness.
-template<typename value_type, endianness endian>
-inline value_type byte_swap(value_type value) {
+template <typename value_type, endianness endian>
+[[nodiscard]] inline value_type byte_swap(value_type value) {
   return byte_swap(value, endian);
 }
 
 /// Read a value of a particular endianness from memory.
 template <typename value_type, std::size_t alignment = unaligned>
-inline value_type read(const void *memory, endianness endian) {
+[[nodiscard]] inline value_type read(const void *memory, endianness endian) {
   value_type ret;
 
   memcpy(&ret,
@@ -70,25 +70,24 @@ inline value_type read(const void *memory, endianness endian) {
   return byte_swap<value_type>(ret, endian);
 }
 
-template<typename value_type,
-         endianness endian,
-         std::size_t alignment>
-inline value_type read(const void *memory) {
+template <typename value_type, endianness endian, std::size_t alignment>
+[[nodiscard]] inline value_type read(const void *memory) {
   return read<value_type, alignment>(memory, endian);
 }
 
 /// Read a value of a particular endianness from a buffer, and increment the
 /// buffer past that value.
 template <typename value_type, std::size_t alignment, typename CharT>
-inline value_type readNext(const CharT *&memory, endianness endian) {
+[[nodiscard]] inline value_type readNext(const CharT *&memory,
+                                         endianness endian) {
   value_type ret = read<value_type, alignment>(memory, endian);
   memory += sizeof(value_type);
   return ret;
 }
 
-template<typename value_type, endianness endian, std::size_t alignment,
-         typename CharT>
-inline value_type readNext(const CharT *&memory) {
+template <typename value_type, endianness endian, std::size_t alignment,
+          typename CharT>
+[[nodiscard]] inline value_type readNext(const CharT *&memory) {
   return readNext<value_type, alignment, CharT>(memory, endian);
 }
 
@@ -114,7 +113,8 @@ using make_unsigned_t = std::make_unsigned_t<value_type>;
 /// Read a value of a particular endianness from memory, for a location
 /// that starts at the given bit offset within the first byte.
 template <typename value_type, endianness endian, std::size_t alignment>
-inline value_type readAtBitAlignment(const void *memory, uint64_t startBit) {
+[[nodiscard]] inline value_type readAtBitAlignment(const void *memory,
+                                                   uint64_t startBit) {
   assert(startBit < 8);
   if (startBit == 0)
     return read<value_type, endian, alignment>(memory);
@@ -349,36 +349,42 @@ using aligned_big_t = detail::packed_endian_specific_integral<T, big, aligned>;
 
 namespace endian {
 
-template <typename T, endianness E> inline T read(const void *P) {
+template <typename T, endianness E> [[nodiscard]] inline T read(const void *P) {
   return *(const detail::packed_endian_specific_integral<T, E, unaligned> *)P;
 }
 
-inline uint16_t read16(const void *P, endianness E) {
+[[nodiscard]] inline uint16_t read16(const void *P, endianness E) {
   return read<uint16_t>(P, E);
 }
-inline uint32_t read32(const void *P, endianness E) {
+[[nodiscard]] inline uint32_t read32(const void *P, endianness E) {
   return read<uint32_t>(P, E);
 }
-inline uint64_t read64(const void *P, endianness E) {
+[[nodiscard]] inline uint64_t read64(const void *P, endianness E) {
   return read<uint64_t>(P, E);
 }
 
-template <endianness E> inline uint16_t read16(const void *P) {
+template <endianness E> [[nodiscard]] inline uint16_t read16(const void *P) {
   return read<uint16_t, E>(P);
 }
-template <endianness E> inline uint32_t read32(const void *P) {
+template <endianness E> [[nodiscard]] inline uint32_t read32(const void *P) {
   return read<uint32_t, E>(P);
 }
-template <endianness E> inline uint64_t read64(const void *P) {
+template <endianness E> [[nodiscard]] inline uint64_t read64(const void *P) {
   return read<uint64_t, E>(P);
 }
 
-inline uint16_t read16le(const void *P) { return read16<little>(P); }
-inline uint32_t read32le(const void *P) { return read32<little>(P); }
-inline uint64_t read64le(const void *P) { return read64<little>(P); }
-inline uint16_t read16be(const void *P) { return read16<big>(P); }
-inline uint32_t read32be(const void *P) { return read32<big>(P); }
-inline uint64_t read64be(const void *P) { return read64<big>(P); }
+[[nodiscard]] inline uint16_t read16le(const void *P) {
+  return read16<little>(P);
+}
+[[nodiscard]] inline uint32_t read32le(const void *P) {
+  return read32<little>(P);
+}
+[[nodiscard]] inline uint64_t read64le(const void *P) {
+  return read64<little>(P);
+}
+[[nodiscard]] inline uint16_t read16be(const void *P) { return read16<big>(P); }
+[[nodiscard]] inline uint32_t read32be(const void *P) { return read32<big>(P); }
+[[nodiscard]] inline uint64_t read64be(const void *P) { return read64<big>(P); }
 
 template <typename T, endianness E> inline void write(void *P, T V) {
   *(detail::packed_endian_specific_integral<T, E, unaligned> *)P = V;

llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

@@ -642,9 +642,10 @@ NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM,
   setI16x2OperationAction(ISD::UREM, MVT::v2i16, Legal, Custom);
 
   // Other arithmetic and logic ops are unsupported.
-  setOperationAction({ISD::SDIV, ISD::UDIV, ISD::SRA, ISD::SRL, ISD::MULHS,
-                      ISD::MULHU, ISD::FP_TO_SINT, ISD::FP_TO_UINT,
-                      ISD::SINT_TO_FP, ISD::UINT_TO_FP},
+  setOperationAction({ISD::AND, ISD::OR, ISD::XOR, ISD::SDIV, ISD::UDIV,
+                      ISD::SRA, ISD::SRL, ISD::MULHS, ISD::MULHU,
+                      ISD::FP_TO_SINT, ISD::FP_TO_UINT, ISD::SINT_TO_FP,
+                      ISD::UINT_TO_FP},
                      MVT::v2i16, Expand);
 
   setOperationAction(ISD::ADDC, MVT::i32, Legal);

llvm/lib/Target/NVPTX/NVPTXInstrInfo.td

@@ -1486,17 +1486,6 @@ defm OR  : BITWISE<"or", or>;
 defm AND : BITWISE<"and", and>;
 defm XOR : BITWISE<"xor", xor>;
 
-// Lower logical ops as bitwise ops on b32.
-// By this point the constants get legalized into a bitcast from i32, so that's
-// what we need to match here.
-def: Pat<(or Int32Regs:$a, (v2i16 (bitconvert (i32 imm:$b)))),
-         (ORb32ri Int32Regs:$a, imm:$b)>;
-def: Pat<(xor Int32Regs:$a, (v2i16 (bitconvert (i32 imm:$b)))),
-         (XORb32ri Int32Regs:$a, imm:$b)>;
-def: Pat<(and Int32Regs:$a, (v2i16 (bitconvert (i32 imm:$b)))),
-         (ANDb32ri Int32Regs:$a, imm:$b)>;
-
-
 def NOT1  : NVPTXInst<(outs Int1Regs:$dst), (ins Int1Regs:$src),
                       "not.pred \t$dst, $src;",
                       [(set Int1Regs:$dst, (not Int1Regs:$src))]>;

llvm/test/CodeGen/NVPTX/i16x2-instructions.ll

@@ -235,70 +235,6 @@ define <2 x i16> @test_mul(<2 x i16> %a, <2 x i16> %b) #0 {
   ret <2 x i16> %r
 }
 
-;; Logical ops are available on all GPUs as regular 32-bit logical ops
-; COMMON-LABEL: test_or(
-; COMMON-DAG:  ld.param.u32    [[A:%r[0-9]+]], [test_or_param_0];
-; COMMON-DAG:  ld.param.u32    [[B:%r[0-9]+]], [test_or_param_1];
-; COMMON-NEXT: or.b32          [[R:%r[0-9]+]], [[A]], [[B]];
-; COMMON-NEXT: st.param.b32    [func_retval0+0], [[R]];
-; COMMON-NEXT: ret;
-define <2 x i16> @test_or(<2 x i16> %a, <2 x i16> %b) #0 {
-  %r = or <2 x i16> %a, %b
-  ret <2 x i16> %r
-}
-
-; Check that we can lower or with immediate arguments.
-; COMMON-LABEL: test_or_imm_0(
-; COMMON-DAG:  ld.param.u32    [[A:%r[0-9]+]], [test_or_imm_0_param_0];
-; COMMON-NEXT: or.b32          [[R:%r[0-9]+]], [[A]], 131073;
-; COMMON-NEXT: st.param.b32    [func_retval0+0], [[R]];
-; COMMON-NEXT: ret;
-define <2 x i16> @test_or_imm_0(<2 x i16> %a) #0 {
-  %r = or <2 x i16> <i16 1, i16 2>, %a
-  ret <2 x i16> %r
-}
-
-; COMMON-LABEL: test_or_imm_1(
-; COMMON-DAG:  ld.param.u32    [[B:%r[0-9]+]], [test_or_imm_1_param_0];
-; COMMON-NEXT: or.b32          [[R:%r[0-9]+]], [[A]], 131073;
-; COMMON-NEXT: st.param.b32    [func_retval0+0], [[R]];
-; COMMON-NEXT: ret;
-define <2 x i16> @test_or_imm_1(<2 x i16> %a) #0 {
-  %r = or <2 x i16> %a, <i16 1, i16 2>
-  ret <2 x i16> %r
-}
-
-; COMMON-LABEL: test_xor(
-; COMMON-DAG:  ld.param.u32    [[A:%r[0-9]+]], [test_xor_param_0];
-; COMMON-DAG:  ld.param.u32    [[B:%r[0-9]+]], [test_xor_param_1];
-; COMMON-NEXT: xor.b32         [[R:%r[0-9]+]], [[A]], [[B]];
-; COMMON-NEXT: st.param.b32    [func_retval0+0], [[R]];
-; COMMON-NEXT: ret;
-define <2 x i16> @test_xor(<2 x i16> %a, <2 x i16> %b) #0 {
-  %r = xor <2 x i16> %a, %b
-  ret <2 x i16> %r
-}
-
-; Check that we can lower xor with immediate arguments.
-; COMMON-LABEL: test_xor_imm_0(
-; COMMON-DAG:  ld.param.u32    [[A:%r[0-9]+]], [test_xor_imm_0_param_0];
-; COMMON-NEXT: xor.b32         [[R:%r[0-9]+]], [[A]], 131073;
-; COMMON-NEXT: st.param.b32    [func_retval0+0], [[R]];
-; COMMON-NEXT: ret;
-define <2 x i16> @test_xor_imm_0(<2 x i16> %a) #0 {
-  %r = xor <2 x i16> <i16 1, i16 2>, %a
-  ret <2 x i16> %r
-}
-
-; COMMON-LABEL: test_xor_imm_1(
-; COMMON-DAG:  ld.param.u32    [[B:%r[0-9]+]], [test_xor_imm_1_param_0];
-; COMMON-NEXT: xor.b32         [[R:%r[0-9]+]], [[A]], 131073;
-; COMMON-NEXT: st.param.b32    [func_retval0+0], [[R]];
-; COMMON-NEXT: ret;
-define <2 x i16> @test_xor_imm_1(<2 x i16> %a) #0 {
-  %r = xor <2 x i16> %a, <i16 1, i16 2>
-  ret <2 x i16> %r
-}
 
 ; COMMON-LABEL: .func test_ldst_v2i16(
 ; COMMON-DAG:    ld.param.u64    [[A:%rd[0-9]+]], [test_ldst_v2i16_param_0];