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tmlindbebarino
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clk: ti: clkctrl: Fix clkdm_clk handling
We need to always call clkdm_clk_enable() and clkdm_clk_disable() even the clkctrl clock(s) enabled for the domain do not have any gate register bits. Otherwise clockdomains may never get enabled except when devices get probed with the legacy "ti,hwmods" devicetree property. Fixes: 88a1725 ("clk: ti: add support for clkctrl clocks") Signed-off-by: Tony Lindgren <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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drivers/clk/ti/clkctrl.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -137,9 +137,6 @@ static int _omap4_clkctrl_clk_enable(struct clk_hw *hw)
137137
int ret;
138138
union omap4_timeout timeout = { 0 };
139139

140-
if (!clk->enable_bit)
141-
return 0;
142-
143140
if (clk->clkdm) {
144141
ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk);
145142
if (ret) {
@@ -151,6 +148,9 @@ static int _omap4_clkctrl_clk_enable(struct clk_hw *hw)
151148
}
152149
}
153150

151+
if (!clk->enable_bit)
152+
return 0;
153+
154154
val = ti_clk_ll_ops->clk_readl(&clk->enable_reg);
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156156
val &= ~OMAP4_MODULEMODE_MASK;
@@ -179,7 +179,7 @@ static void _omap4_clkctrl_clk_disable(struct clk_hw *hw)
179179
union omap4_timeout timeout = { 0 };
180180

181181
if (!clk->enable_bit)
182-
return;
182+
goto exit;
183183

184184
val = ti_clk_ll_ops->clk_readl(&clk->enable_reg);
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