Skip to content

Commit 9fe02c0

Browse files
committed
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (25 commits) [ARM] 5519/1: amba probe: pass "struct amba_id *" instead of void * [ARM] 5517/1: integrator: don't put clock lookups in __initdata [ARM] 5518/1: versatile: don't put clock lookups in __initdata [ARM] mach-l7200: fix spelling of SYS_CLOCK_OFF [ARM] Double check memmap is actually valid with a memmap has unexpected holes V2 [ARM] realview: fix broadcast tick support [ARM] realview: remove useless smp_cross_call_done() [ARM] smp: fix cpumask usage in ARM SMP code [ARM] 5513/1: Eurotech VIPER SBC: fix compilation error [ARM] 5509/1: ep93xx: clkdev enable UARTS ARM: OMAP2/3: Change omapfb to use clkdev for dispc and rfbi, v2 ARM: OMAP3: Fix HW SAVEANDRESTORE shift define ARM: OMAP3: Fix number of GPIO lines for 34xx [ARM] S3C: Do not set clk->owner field if unset [ARM] S3C2410: mach-bast.c registering i2c data too early [ARM] S3C24XX: Fix unused code warning in arch/arm/plat-s3c24xx/dma.c [ARM] S3C64XX: fix GPIO debug [ARM] S3C64XX: GPIO include cleanup [ARM] nwfpe: fix 'floatx80_is_nan' sparse warning [ARM] nwfpe: Add decleration for ExtendedCPDO ...
2 parents 6c2445e + 03fbdb1 commit 9fe02c0

File tree

45 files changed

+217
-164
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

45 files changed

+217
-164
lines changed

arch/arm/Kconfig

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -273,6 +273,7 @@ config ARCH_EP93XX
273273
select HAVE_CLK
274274
select COMMON_CLKDEV
275275
select ARCH_REQUIRE_GPIOLIB
276+
select ARCH_HAS_HOLES_MEMORYMODEL
276277
help
277278
This enables support for the Cirrus EP93xx series of CPUs.
278279

@@ -976,10 +977,9 @@ config OABI_COMPAT
976977
UNPREDICTABLE (in fact it can be predicted that it won't work
977978
at all). If in doubt say Y.
978979

979-
config ARCH_FLATMEM_HAS_HOLES
980+
config ARCH_HAS_HOLES_MEMORYMODEL
980981
bool
981-
default y
982-
depends on FLATMEM
982+
default n
983983

984984
# Discontigmem is deprecated
985985
config ARCH_DISCONTIGMEM_ENABLE

arch/arm/common/gic.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -253,9 +253,9 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
253253
}
254254

255255
#ifdef CONFIG_SMP
256-
void gic_raise_softirq(cpumask_t cpumask, unsigned int irq)
256+
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
257257
{
258-
unsigned long map = *cpus_addr(cpumask);
258+
unsigned long map = *cpus_addr(*mask);
259259

260260
/* this always happens on GIC0 */
261261
writel(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT);

arch/arm/include/asm/hardware/gic.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@
3636
void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start);
3737
void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
3838
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
39-
void gic_raise_softirq(cpumask_t cpumask, unsigned int irq);
39+
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
4040
#endif
4141

4242
#endif

arch/arm/include/asm/smp.h

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -53,17 +53,12 @@ extern void smp_store_cpu_info(unsigned int cpuid);
5353
/*
5454
* Raise an IPI cross call on CPUs in callmap.
5555
*/
56-
extern void smp_cross_call(cpumask_t callmap);
57-
58-
/*
59-
* Broadcast a timer interrupt to the other CPUs.
60-
*/
61-
extern void smp_send_timer(void);
56+
extern void smp_cross_call(const struct cpumask *mask);
6257

6358
/*
6459
* Broadcast a clock event to other CPUs.
6560
*/
66-
extern void smp_timer_broadcast(cpumask_t mask);
61+
extern void smp_timer_broadcast(const struct cpumask *mask);
6762

6863
/*
6964
* Boot a secondary CPU, and assign it the specified idle task.
@@ -102,7 +97,8 @@ extern int platform_cpu_kill(unsigned int cpu);
10297
extern void platform_cpu_enable(unsigned int cpu);
10398

10499
extern void arch_send_call_function_single_ipi(int cpu);
105-
extern void arch_send_call_function_ipi(cpumask_t mask);
100+
extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
101+
#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
106102

107103
/*
108104
* Local timer interrupt handling function (can be IPI'ed).

arch/arm/kernel/smp.c

Lines changed: 16 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -326,14 +326,14 @@ void __init smp_prepare_boot_cpu(void)
326326
per_cpu(cpu_data, cpu).idle = current;
327327
}
328328

329-
static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
329+
static void send_ipi_message(const struct cpumask *mask, enum ipi_msg_type msg)
330330
{
331331
unsigned long flags;
332332
unsigned int cpu;
333333

334334
local_irq_save(flags);
335335

336-
for_each_cpu_mask(cpu, callmap) {
336+
for_each_cpu(cpu, mask) {
337337
struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
338338

339339
spin_lock(&ipi->lock);
@@ -344,19 +344,19 @@ static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
344344
/*
345345
* Call the platform specific cross-CPU call function.
346346
*/
347-
smp_cross_call(callmap);
347+
smp_cross_call(mask);
348348

349349
local_irq_restore(flags);
350350
}
351351

352-
void arch_send_call_function_ipi(cpumask_t mask)
352+
void arch_send_call_function_ipi_mask(const struct cpumask *mask)
353353
{
354354
send_ipi_message(mask, IPI_CALL_FUNC);
355355
}
356356

357357
void arch_send_call_function_single_ipi(int cpu)
358358
{
359-
send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE);
359+
send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
360360
}
361361

362362
void show_ipi_list(struct seq_file *p)
@@ -498,17 +498,10 @@ asmlinkage void __exception do_IPI(struct pt_regs *regs)
498498

499499
void smp_send_reschedule(int cpu)
500500
{
501-
send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE);
501+
send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
502502
}
503503

504-
void smp_send_timer(void)
505-
{
506-
cpumask_t mask = cpu_online_map;
507-
cpu_clear(smp_processor_id(), mask);
508-
send_ipi_message(mask, IPI_TIMER);
509-
}
510-
511-
void smp_timer_broadcast(cpumask_t mask)
504+
void smp_timer_broadcast(const struct cpumask *mask)
512505
{
513506
send_ipi_message(mask, IPI_TIMER);
514507
}
@@ -517,7 +510,7 @@ void smp_send_stop(void)
517510
{
518511
cpumask_t mask = cpu_online_map;
519512
cpu_clear(smp_processor_id(), mask);
520-
send_ipi_message(mask, IPI_CPU_STOP);
513+
send_ipi_message(&mask, IPI_CPU_STOP);
521514
}
522515

523516
/*
@@ -528,20 +521,17 @@ int setup_profiling_timer(unsigned int multiplier)
528521
return -EINVAL;
529522
}
530523

531-
static int
532-
on_each_cpu_mask(void (*func)(void *), void *info, int wait, cpumask_t mask)
524+
static void
525+
on_each_cpu_mask(void (*func)(void *), void *info, int wait,
526+
const struct cpumask *mask)
533527
{
534-
int ret = 0;
535-
536528
preempt_disable();
537529

538-
ret = smp_call_function_mask(mask, func, info, wait);
539-
if (cpu_isset(smp_processor_id(), mask))
530+
smp_call_function_many(mask, func, info, wait);
531+
if (cpumask_test_cpu(smp_processor_id(), mask))
540532
func(info);
541533

542534
preempt_enable();
543-
544-
return ret;
545535
}
546536

547537
/**********************************************************************/
@@ -602,20 +592,17 @@ void flush_tlb_all(void)
602592

603593
void flush_tlb_mm(struct mm_struct *mm)
604594
{
605-
cpumask_t mask = mm->cpu_vm_mask;
606-
607-
on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mask);
595+
on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, &mm->cpu_vm_mask);
608596
}
609597

610598
void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
611599
{
612-
cpumask_t mask = vma->vm_mm->cpu_vm_mask;
613600
struct tlb_args ta;
614601

615602
ta.ta_vma = vma;
616603
ta.ta_start = uaddr;
617604

618-
on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mask);
605+
on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, &vma->vm_mm->cpu_vm_mask);
619606
}
620607

621608
void flush_tlb_kernel_page(unsigned long kaddr)
@@ -630,14 +617,13 @@ void flush_tlb_kernel_page(unsigned long kaddr)
630617
void flush_tlb_range(struct vm_area_struct *vma,
631618
unsigned long start, unsigned long end)
632619
{
633-
cpumask_t mask = vma->vm_mm->cpu_vm_mask;
634620
struct tlb_args ta;
635621

636622
ta.ta_vma = vma;
637623
ta.ta_start = start;
638624
ta.ta_end = end;
639625

640-
on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mask);
626+
on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, &vma->vm_mm->cpu_vm_mask);
641627
}
642628

643629
void flush_tlb_kernel_range(unsigned long start, unsigned long end)

arch/arm/mach-ep93xx/clock.c

Lines changed: 61 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -21,15 +21,50 @@
2121
#include <asm/div64.h>
2222
#include <mach/hardware.h>
2323

24+
25+
/*
26+
* The EP93xx has two external crystal oscillators. To generate the
27+
* required high-frequency clocks, the processor uses two phase-locked-
28+
* loops (PLLs) to multiply the incoming external clock signal to much
29+
* higher frequencies that are then divided down by programmable dividers
30+
* to produce the needed clocks. The PLLs operate independently of one
31+
* another.
32+
*/
33+
#define EP93XX_EXT_CLK_RATE 14745600
34+
#define EP93XX_EXT_RTC_RATE 32768
35+
36+
2437
struct clk {
2538
unsigned long rate;
2639
int users;
40+
int sw_locked;
2741
u32 enable_reg;
2842
u32 enable_mask;
43+
44+
unsigned long (*get_rate)(struct clk *clk);
2945
};
3046

31-
static struct clk clk_uart = {
32-
.rate = 14745600,
47+
48+
static unsigned long get_uart_rate(struct clk *clk);
49+
50+
51+
static struct clk clk_uart1 = {
52+
.sw_locked = 1,
53+
.enable_reg = EP93XX_SYSCON_DEVICE_CONFIG,
54+
.enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U1EN,
55+
.get_rate = get_uart_rate,
56+
};
57+
static struct clk clk_uart2 = {
58+
.sw_locked = 1,
59+
.enable_reg = EP93XX_SYSCON_DEVICE_CONFIG,
60+
.enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U2EN,
61+
.get_rate = get_uart_rate,
62+
};
63+
static struct clk clk_uart3 = {
64+
.sw_locked = 1,
65+
.enable_reg = EP93XX_SYSCON_DEVICE_CONFIG,
66+
.enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U3EN,
67+
.get_rate = get_uart_rate,
3368
};
3469
static struct clk clk_pll1;
3570
static struct clk clk_f;
@@ -95,9 +130,9 @@ static struct clk clk_m2m1 = {
95130
{ .dev_id = dev, .con_id = con, .clk = ck }
96131

97132
static struct clk_lookup clocks[] = {
98-
INIT_CK("apb:uart1", NULL, &clk_uart),
99-
INIT_CK("apb:uart2", NULL, &clk_uart),
100-
INIT_CK("apb:uart3", NULL, &clk_uart),
133+
INIT_CK("apb:uart1", NULL, &clk_uart1),
134+
INIT_CK("apb:uart2", NULL, &clk_uart2),
135+
INIT_CK("apb:uart3", NULL, &clk_uart3),
101136
INIT_CK(NULL, "pll1", &clk_pll1),
102137
INIT_CK(NULL, "fclk", &clk_f),
103138
INIT_CK(NULL, "hclk", &clk_h),
@@ -125,6 +160,8 @@ int clk_enable(struct clk *clk)
125160
u32 value;
126161

127162
value = __raw_readl(clk->enable_reg);
163+
if (clk->sw_locked)
164+
__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
128165
__raw_writel(value | clk->enable_mask, clk->enable_reg);
129166
}
130167

@@ -138,13 +175,29 @@ void clk_disable(struct clk *clk)
138175
u32 value;
139176

140177
value = __raw_readl(clk->enable_reg);
178+
if (clk->sw_locked)
179+
__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
141180
__raw_writel(value & ~clk->enable_mask, clk->enable_reg);
142181
}
143182
}
144183
EXPORT_SYMBOL(clk_disable);
145184

185+
static unsigned long get_uart_rate(struct clk *clk)
186+
{
187+
u32 value;
188+
189+
value = __raw_readl(EP93XX_SYSCON_CLOCK_CONTROL);
190+
if (value & EP93XX_SYSCON_CLOCK_UARTBAUD)
191+
return EP93XX_EXT_CLK_RATE;
192+
else
193+
return EP93XX_EXT_CLK_RATE / 2;
194+
}
195+
146196
unsigned long clk_get_rate(struct clk *clk)
147197
{
198+
if (clk->get_rate)
199+
return clk->get_rate(clk);
200+
148201
return clk->rate;
149202
}
150203
EXPORT_SYMBOL(clk_get_rate);
@@ -162,7 +215,7 @@ static unsigned long calc_pll_rate(u32 config_word)
162215
unsigned long long rate;
163216
int i;
164217

165-
rate = 14745600;
218+
rate = EP93XX_EXT_CLK_RATE;
166219
rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */
167220
rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */
168221
do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */
@@ -195,7 +248,7 @@ static int __init ep93xx_clock_init(void)
195248

196249
value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
197250
if (!(value & 0x00800000)) { /* PLL1 bypassed? */
198-
clk_pll1.rate = 14745600;
251+
clk_pll1.rate = EP93XX_EXT_CLK_RATE;
199252
} else {
200253
clk_pll1.rate = calc_pll_rate(value);
201254
}
@@ -206,7 +259,7 @@ static int __init ep93xx_clock_init(void)
206259

207260
value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2);
208261
if (!(value & 0x00080000)) { /* PLL2 bypassed? */
209-
clk_pll2.rate = 14745600;
262+
clk_pll2.rate = EP93XX_EXT_CLK_RATE;
210263
} else if (value & 0x00040000) { /* PLL2 enabled? */
211264
clk_pll2.rate = calc_pll_rate(value);
212265
} else {

arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -159,7 +159,10 @@
159159
#define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20)
160160
#define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24)
161161
#define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80)
162-
#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000
162+
#define EP93XX_SYSCON_DEVICE_CONFIG_U3EN (1<<24)
163+
#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE (1<<23)
164+
#define EP93XX_SYSCON_DEVICE_CONFIG_U2EN (1<<20)
165+
#define EP93XX_SYSCON_DEVICE_CONFIG_U1EN (1<<18)
163166
#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
164167

165168
#define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000)

arch/arm/mach-integrator/core.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,7 @@ static struct clk uartclk = {
121121
.rate = 14745600,
122122
};
123123

124-
static struct clk_lookup lookups[] __initdata = {
124+
static struct clk_lookup lookups[] = {
125125
{ /* UART0 */
126126
.dev_id = "mb:16",
127127
.clk = &uartclk,

arch/arm/mach-l7200/include/mach/sys-clock.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@
1818

1919
/* IO_START and IO_BASE are defined in hardware.h */
2020

21-
#define SYS_CLOCK_START (IO_START + SYS_CLCOK_OFF) /* Physical address */
21+
#define SYS_CLOCK_START (IO_START + SYS_CLOCK_OFF) /* Physical address */
2222
#define SYS_CLOCK_BASE (IO_BASE + SYS_CLOCK_OFF) /* Virtual address */
2323

2424
/* Define the interface to the SYS_CLOCK */

arch/arm/mach-omap2/clock24xx.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -103,10 +103,10 @@ static struct omap_clk omap24xx_clks[] = {
103103
CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
104104
CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
105105
/* DSS domain clocks */
106-
CLK(NULL, "dss_ick", &dss_ick, CK_243X | CK_242X),
107-
CLK(NULL, "dss1_fck", &dss1_fck, CK_243X | CK_242X),
108-
CLK(NULL, "dss2_fck", &dss2_fck, CK_243X | CK_242X),
109-
CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X | CK_242X),
106+
CLK("omapfb", "ick", &dss_ick, CK_243X | CK_242X),
107+
CLK("omapfb", "dss1_fck", &dss1_fck, CK_243X | CK_242X),
108+
CLK("omapfb", "dss2_fck", &dss2_fck, CK_243X | CK_242X),
109+
CLK("omapfb", "tv_fck", &dss_54m_fck, CK_243X | CK_242X),
110110
/* L3 domain clocks */
111111
CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X),
112112
CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X),
@@ -206,7 +206,7 @@ static struct omap_clk omap24xx_clks[] = {
206206
CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X),
207207
CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X),
208208
CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X),
209-
CLK(NULL, "usbhs_ick", &usbhs_ick, CK_243X),
209+
CLK("musb_hdrc", "ick", &usbhs_ick, CK_243X),
210210
CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X),
211211
CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X),
212212
CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X),

0 commit comments

Comments
 (0)