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mmc: sdhci-msm: Utilize bulk clock API
By stuffing the runtime controlled clocks into a clk_bulk_data array we can utilize the newly introduced bulk clock operations and clean up the error paths. This allow us to handle additional clocks in subsequent patch, without the added complexity. Cc: Ritesh Harjani <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Tested-by: Jeremy McNicoll <[email protected]> Signed-off-by: Ulf Hansson <[email protected]>
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drivers/mmc/host/sdhci-msm.c

Lines changed: 34 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -127,10 +127,9 @@ struct sdhci_msm_host {
127127
struct platform_device *pdev;
128128
void __iomem *core_mem; /* MSM SDCC mapped address */
129129
int pwr_irq; /* power irq */
130-
struct clk *clk; /* main SD/MMC bus clock */
131-
struct clk *pclk; /* SDHC peripheral bus clock */
132130
struct clk *bus_clk; /* SDHC bus voter clock */
133131
struct clk *xo_clk; /* TCXO clk needed for FLL feature of cm_dll*/
132+
struct clk_bulk_data bulk_clks[2]; /* core, iface clocks */
134133
unsigned long clk_rate;
135134
struct mmc_host *mmc;
136135
bool use_14lpp_dll_reset;
@@ -164,10 +163,11 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host,
164163
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
165164
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
166165
struct mmc_ios curr_ios = host->mmc->ios;
166+
struct clk *core_clk = msm_host->bulk_clks[0].clk;
167167
int rc;
168168

169169
clock = msm_get_clock_rate_for_bus_mode(host, clock);
170-
rc = clk_set_rate(msm_host->clk, clock);
170+
rc = clk_set_rate(core_clk, clock);
171171
if (rc) {
172172
pr_err("%s: Failed to set clock at rate %u at timing %d\n",
173173
mmc_hostname(host->mmc), clock,
@@ -176,7 +176,7 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host,
176176
}
177177
msm_host->clk_rate = clock;
178178
pr_debug("%s: Setting clock at rate %lu at timing %d\n",
179-
mmc_hostname(host->mmc), clk_get_rate(msm_host->clk),
179+
mmc_hostname(host->mmc), clk_get_rate(core_clk),
180180
curr_ios.timing);
181181
}
182182

@@ -1032,8 +1032,9 @@ static unsigned int sdhci_msm_get_max_clock(struct sdhci_host *host)
10321032
{
10331033
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
10341034
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
1035+
struct clk *core_clk = msm_host->bulk_clks[0].clk;
10351036

1036-
return clk_round_rate(msm_host->clk, ULONG_MAX);
1037+
return clk_round_rate(core_clk, ULONG_MAX);
10371038
}
10381039

10391040
static unsigned int sdhci_msm_get_min_clock(struct sdhci_host *host)
@@ -1124,6 +1125,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)
11241125
struct sdhci_pltfm_host *pltfm_host;
11251126
struct sdhci_msm_host *msm_host;
11261127
struct resource *core_memres;
1128+
struct clk *clk;
11271129
int ret;
11281130
u16 host_version, core_minor;
11291131
u32 core_version, config;
@@ -1160,24 +1162,32 @@ static int sdhci_msm_probe(struct platform_device *pdev)
11601162
}
11611163

11621164
/* Setup main peripheral bus clock */
1163-
msm_host->pclk = devm_clk_get(&pdev->dev, "iface");
1164-
if (IS_ERR(msm_host->pclk)) {
1165-
ret = PTR_ERR(msm_host->pclk);
1165+
clk = devm_clk_get(&pdev->dev, "iface");
1166+
if (IS_ERR(clk)) {
1167+
ret = PTR_ERR(clk);
11661168
dev_err(&pdev->dev, "Peripheral clk setup failed (%d)\n", ret);
11671169
goto bus_clk_disable;
11681170
}
1169-
1170-
ret = clk_prepare_enable(msm_host->pclk);
1171-
if (ret)
1172-
goto bus_clk_disable;
1171+
msm_host->bulk_clks[1].clk = clk;
11731172

11741173
/* Setup SDC MMC clock */
1175-
msm_host->clk = devm_clk_get(&pdev->dev, "core");
1176-
if (IS_ERR(msm_host->clk)) {
1177-
ret = PTR_ERR(msm_host->clk);
1174+
clk = devm_clk_get(&pdev->dev, "core");
1175+
if (IS_ERR(clk)) {
1176+
ret = PTR_ERR(clk);
11781177
dev_err(&pdev->dev, "SDC MMC clk setup failed (%d)\n", ret);
1179-
goto pclk_disable;
1178+
goto bus_clk_disable;
11801179
}
1180+
msm_host->bulk_clks[0].clk = clk;
1181+
1182+
/* Vote for maximum clock rate for maximum performance */
1183+
ret = clk_set_rate(clk, INT_MAX);
1184+
if (ret)
1185+
dev_warn(&pdev->dev, "core clock boost failed\n");
1186+
1187+
ret = clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks),
1188+
msm_host->bulk_clks);
1189+
if (ret)
1190+
goto bus_clk_disable;
11811191

11821192
/*
11831193
* xo clock is needed for FLL feature of cm_dll.
@@ -1189,15 +1199,6 @@ static int sdhci_msm_probe(struct platform_device *pdev)
11891199
dev_warn(&pdev->dev, "TCXO clk not present (%d)\n", ret);
11901200
}
11911201

1192-
/* Vote for maximum clock rate for maximum performance */
1193-
ret = clk_set_rate(msm_host->clk, INT_MAX);
1194-
if (ret)
1195-
dev_warn(&pdev->dev, "core clock boost failed\n");
1196-
1197-
ret = clk_prepare_enable(msm_host->clk);
1198-
if (ret)
1199-
goto pclk_disable;
1200-
12011202
core_memres = platform_get_resource(pdev, IORESOURCE_MEM, 1);
12021203
msm_host->core_mem = devm_ioremap_resource(&pdev->dev, core_memres);
12031204

@@ -1290,9 +1291,8 @@ static int sdhci_msm_probe(struct platform_device *pdev)
12901291
pm_runtime_set_suspended(&pdev->dev);
12911292
pm_runtime_put_noidle(&pdev->dev);
12921293
clk_disable:
1293-
clk_disable_unprepare(msm_host->clk);
1294-
pclk_disable:
1295-
clk_disable_unprepare(msm_host->pclk);
1294+
clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),
1295+
msm_host->bulk_clks);
12961296
bus_clk_disable:
12971297
if (!IS_ERR(msm_host->bus_clk))
12981298
clk_disable_unprepare(msm_host->bus_clk);
@@ -1315,8 +1315,8 @@ static int sdhci_msm_remove(struct platform_device *pdev)
13151315
pm_runtime_disable(&pdev->dev);
13161316
pm_runtime_put_noidle(&pdev->dev);
13171317

1318-
clk_disable_unprepare(msm_host->clk);
1319-
clk_disable_unprepare(msm_host->pclk);
1318+
clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),
1319+
msm_host->bulk_clks);
13201320
if (!IS_ERR(msm_host->bus_clk))
13211321
clk_disable_unprepare(msm_host->bus_clk);
13221322
sdhci_pltfm_free(pdev);
@@ -1330,8 +1330,8 @@ static int sdhci_msm_runtime_suspend(struct device *dev)
13301330
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
13311331
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
13321332

1333-
clk_disable_unprepare(msm_host->clk);
1334-
clk_disable_unprepare(msm_host->pclk);
1333+
clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),
1334+
msm_host->bulk_clks);
13351335

13361336
return 0;
13371337
}
@@ -1341,21 +1341,9 @@ static int sdhci_msm_runtime_resume(struct device *dev)
13411341
struct sdhci_host *host = dev_get_drvdata(dev);
13421342
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
13431343
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
1344-
int ret;
13451344

1346-
ret = clk_prepare_enable(msm_host->clk);
1347-
if (ret) {
1348-
dev_err(dev, "clk_enable failed for core_clk: %d\n", ret);
1349-
return ret;
1350-
}
1351-
ret = clk_prepare_enable(msm_host->pclk);
1352-
if (ret) {
1353-
dev_err(dev, "clk_enable failed for iface_clk: %d\n", ret);
1354-
clk_disable_unprepare(msm_host->clk);
1355-
return ret;
1356-
}
1357-
1358-
return 0;
1345+
return clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks),
1346+
msm_host->bulk_clks);
13591347
}
13601348
#endif
13611349

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