|
| 1 | +/* |
| 2 | + * Copyright 2017 NXP |
| 3 | + * All rights reserved. |
| 4 | + * |
| 5 | + * SPDX-License-Identifier: BSD-3-Clause |
| 6 | + */ |
| 7 | + |
| 8 | +#include "boards/flash_config.h" |
| 9 | + |
| 10 | +#include "fsl_flexspi_nor_boot.h" |
| 11 | + |
| 12 | + |
| 13 | +__attribute__((section(".boot_hdr.ivt"))) |
| 14 | +/************************************* |
| 15 | + * IVT Data |
| 16 | + *************************************/ |
| 17 | +const ivt image_vector_table = { |
| 18 | + IVT_HEADER, /* IVT Header */ |
| 19 | + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ |
| 20 | + IVT_RSVD, /* Reserved = 0 */ |
| 21 | + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ |
| 22 | + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ |
| 23 | + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ |
| 24 | + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ |
| 25 | + IVT_RSVD /* Reserved = 0 */ |
| 26 | +}; |
| 27 | + |
| 28 | +__attribute__((section(".boot_hdr.boot_data"))) |
| 29 | +/************************************* |
| 30 | + * Boot Data |
| 31 | + *************************************/ |
| 32 | +const BOOT_DATA_T boot_data = { |
| 33 | + FLASH_BASE, /* boot start location */ |
| 34 | + FLASH_SIZE, /* size */ |
| 35 | + PLUGIN_FLAG, /* Plugin flag*/ |
| 36 | + 0xFFFFFFFF /* empty - extra data word */ |
| 37 | +}; |
| 38 | + |
| 39 | +// Config for W25Q64JV with QSPI routed. |
| 40 | +__attribute__((section(".boot_hdr.conf"))) |
| 41 | +const flexspi_nor_config_t qspiflash_config = { |
| 42 | + .pageSize = 256u, |
| 43 | + .sectorSize = 4u * 1024u, |
| 44 | + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, |
| 45 | + .blockSize = 0x00010000, |
| 46 | + .isUniformBlockSize = false, |
| 47 | + .memConfig = |
| 48 | + { |
| 49 | + .tag = FLEXSPI_CFG_BLK_TAG, |
| 50 | + .version = FLEXSPI_CFG_BLK_VERSION, |
| 51 | + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, |
| 52 | + .csHoldTime = 3u, |
| 53 | + .csSetupTime = 3u, |
| 54 | + |
| 55 | + .busyOffset = 0u, // Status bit 0 indicates busy. |
| 56 | + .busyBitPolarity = 0u, // Busy when the bit is 1. |
| 57 | + |
| 58 | + .deviceModeCfgEnable = 1u, |
| 59 | + .deviceModeType = kDeviceConfigCmdType_QuadEnable, |
| 60 | + .deviceModeSeq = { |
| 61 | + .seqId = 4u, |
| 62 | + .seqNum = 1u, |
| 63 | + }, |
| 64 | + .deviceModeArg = 0x02, |
| 65 | + .deviceType = kFlexSpiDeviceType_SerialNOR, |
| 66 | + .sflashPadType = kSerialFlash_4Pads, |
| 67 | + .serialClkFreq = kFlexSpiSerialClk_60MHz, |
| 68 | + .sflashA1Size = FLASH_SIZE, |
| 69 | + .lookupTable = |
| 70 | + { |
| 71 | + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) |
| 72 | + // The high 16 bits is command 1 and the low are command 0. |
| 73 | + // Within a command, the top 6 bits are the opcode, the next two are the number |
| 74 | + // of pads and then last byte is the operand. The operand's meaning changes |
| 75 | + // per opcode. |
| 76 | + |
| 77 | + // Indices with ROM should always have the same function because the ROM |
| 78 | + // bootloader uses it. |
| 79 | + |
| 80 | + // 0: ROM: Read LUTs |
| 81 | + // Quad version |
| 82 | + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */, |
| 83 | + RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */), |
| 84 | + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */, |
| 85 | + READ_SDR, FLEXSPI_4PAD, 0x04), |
| 86 | + // Single fast read version, good for debugging. |
| 87 | + // FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */, |
| 88 | + // RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), |
| 89 | + // FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */, |
| 90 | + // READ_SDR, FLEXSPI_1PAD, 0x04), |
| 91 | + TWO_EMPTY_STEPS, |
| 92 | + TWO_EMPTY_STEPS), |
| 93 | + |
| 94 | + // 1: ROM: Read status |
| 95 | + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */, |
| 96 | + READ_SDR, FLEXSPI_1PAD, 0x01), |
| 97 | + TWO_EMPTY_STEPS, |
| 98 | + TWO_EMPTY_STEPS, |
| 99 | + TWO_EMPTY_STEPS), |
| 100 | + |
| 101 | + // 2: Empty |
| 102 | + EMPTY_SEQUENCE, |
| 103 | + |
| 104 | + // 3: ROM: Write Enable |
| 105 | + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */, |
| 106 | + STOP, FLEXSPI_1PAD, 0x00), |
| 107 | + TWO_EMPTY_STEPS, |
| 108 | + TWO_EMPTY_STEPS, |
| 109 | + TWO_EMPTY_STEPS), |
| 110 | + |
| 111 | + // 4: Config: Write Status |
| 112 | + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x31 /* the command to send */, |
| 113 | + WRITE_SDR, FLEXSPI_1PAD, 0x01), |
| 114 | + TWO_EMPTY_STEPS, |
| 115 | + TWO_EMPTY_STEPS, |
| 116 | + TWO_EMPTY_STEPS), |
| 117 | + |
| 118 | + // 5: ROM: Erase Sector |
| 119 | + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */, |
| 120 | + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), |
| 121 | + TWO_EMPTY_STEPS, |
| 122 | + TWO_EMPTY_STEPS, |
| 123 | + TWO_EMPTY_STEPS), |
| 124 | + |
| 125 | + // 6: Empty |
| 126 | + EMPTY_SEQUENCE, |
| 127 | + |
| 128 | + // 7: Empty |
| 129 | + EMPTY_SEQUENCE, |
| 130 | + |
| 131 | + // 8: Block Erase |
| 132 | + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */, |
| 133 | + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), |
| 134 | + TWO_EMPTY_STEPS, |
| 135 | + TWO_EMPTY_STEPS, |
| 136 | + TWO_EMPTY_STEPS), |
| 137 | + |
| 138 | + // 9: ROM: Page program |
| 139 | + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */, |
| 140 | + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), |
| 141 | + |
| 142 | + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */, |
| 143 | + STOP, FLEXSPI_1PAD, 0), |
| 144 | + TWO_EMPTY_STEPS, |
| 145 | + TWO_EMPTY_STEPS), |
| 146 | + |
| 147 | + // 10: Empty |
| 148 | + EMPTY_SEQUENCE, |
| 149 | + |
| 150 | + // 11: ROM: Chip erase |
| 151 | + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */, |
| 152 | + STOP, FLEXSPI_1PAD, 0), |
| 153 | + TWO_EMPTY_STEPS, |
| 154 | + TWO_EMPTY_STEPS, |
| 155 | + TWO_EMPTY_STEPS), |
| 156 | + |
| 157 | + // 12: Empty |
| 158 | + EMPTY_SEQUENCE, |
| 159 | + |
| 160 | + // 13: ROM: Read SFDP |
| 161 | + EMPTY_SEQUENCE, |
| 162 | + |
| 163 | + // 14: ROM: Restore no cmd |
| 164 | + EMPTY_SEQUENCE, |
| 165 | + |
| 166 | + // 15: ROM: Dummy |
| 167 | + EMPTY_SEQUENCE |
| 168 | + }, |
| 169 | + }, |
| 170 | +}; |
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