STM32: Adds support for the stm32f746g_disco board

[k0d]

@hierophect Can you take a look at this and give your comments, specifically on the clocks.c changes. I'm not sure how you'd like to have this.

[hierophect]

The simplest solution here would be to simply default to 200MHz for the F746 overall, rather than the fastest possible speed for the chip, but that's a bit of a cop-out. I think another easy fix would be to have some #ifndef PLLQ_VALUE defaults for this file that can be overridden at the board level.

@tannewt do you have a preference here?

[hierophect]

Also, thank you for putting in the TFBGA216! That's a ton of work, much appreciated!

[hierophect]

I just realized on reviewing more closely that my suggestion is what your code already does - guess we were on the same wavelength.

[tannewt]

Do you still need an answer from me? I'm not sure what the question was.

[hierophect]

Do you still need an answer from me? I'm not sure what the question was.

@tannewt since you've been working with the clock files recently I was hoping for your input on including ifndef-mediated default values for the clock divisors (PLLM, PLLQ, etc) in each MCU line's clocks.c. These could then be overridden at the board level in the case that a board needs to suppress clock speed for a certain purpose (like external SRAM). Would this break anything for your low-power code or vision for encapsulation?

@k0d rebase looks good, I'll do a full review tomorrow but for now seems like CI is just failing due to the linker filename change.

[k0d]

@hierophect I'm going to look at this a bit more before I say it's ready from my side. I'd like to test more of the functionality first. I won't implement Audio/TFT/Ext.Flash/Ext.SDRAM in this PR though. I guess that's ok with you?

[hierophect]

@k0d we tend to go for shorter PRs most of the time, there are a lot of boards with major features missing - it makes the work available to others if they'd like to contribute as well. That policy often goes double for boards like the Discoveries since they could suck up a lot of time for features that we don't know the actual demand for.

[tannewt]

Do you still need an answer from me? I'm not sure what the question was.

@tannewt since you've been working with the clock files recently I was hoping for your input on including ifndef-mediated default values for the clock divisors (PLLM, PLLQ, etc) in each MCU line's clocks.c. These could then be overridden at the board level in the case that a board needs to suppress clock speed for a certain purpose (like external SRAM). Would this break anything for your low-power code or vision for encapsulation?

I think ifndef defaults are totally fine. lower power is only impacted by the RTC config at this point. I'd start with this and we can adapt later if needed.

[hierophect]

Great. I may go ahead and add this feature for all ports at some point (probably once the low power code is in), since it's low effort and could add flexibility for other use cases we don't know of across all boards.

[k0d]

@hierophect I've tested this a lot and feel that it's ready to go after a code-review.

[hierophect]

I had a couple of comments but they may not even need to be implemented, so I'm tagging this approved if it all looks good to you. We'll need to revisit board.c anyway after the low power stuff goes through. Overall this looks great, nice work.

[k0d]

I'm happy, the CI failed check doesn't matter, it was a GitHub timeout. Can you merge without me restarting the checks again? @hierophect

[hierophect]

All set! thanks for the ping, and the PR!