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Merged
merged 3 commits into from
Jun 8, 2020
Merged

STM32: Rework LSE clock init, allow clock overrides #3009

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d14e344
Rework LSE clock init, allow clock overrides
hierophect Jun 2, 2020
a0977ca
Merge remote-tracking branch 'upstream/master' into stm32-LSE-startup…
hierophect Jun 4, 2020
ad0971f
Override HAL_Delay and HAL_GetTick
hierophect Jun 5, 2020
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4 changes: 2 additions & 2 deletions ports/stm/Makefile
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Expand Up @@ -207,11 +207,11 @@ SRC_C += \
mphalport.c \
boards/$(BOARD)/board.c \
boards/$(BOARD)/pins.c \
peripherals/stm32$(MCU_SERIES_LOWER)/clocks.c \
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/pins.c \
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/clocks.c \
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/gpio.c \
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/periph.c \
packages/$(MCU_PACKAGE).c\
packages/$(MCU_PACKAGE).c \
lib/libc/string0.c \
lib/mp-readline/readline.c \
lib/oofatfs/ff.c \
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3 changes: 2 additions & 1 deletion ports/stm/boards/espruino_pico/mpconfigboard.h
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Expand Up @@ -35,5 +35,6 @@
#define AUTORESET_DELAY_MS (500)
#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)

#define BOARD_OSC_DIV (8)
#define HSE_VALUE ((uint32_t)8000000)
#define LSE_VALUE ((uint32_t)32768)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
3 changes: 2 additions & 1 deletion ports/stm/boards/espruino_wifi/mpconfigboard.h
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Expand Up @@ -32,6 +32,7 @@
#define FLASH_SIZE (0x80000) //512K
#define FLASH_PAGE_SIZE (0x4000) //16K

#define BOARD_OSC_DIV (8)
#define HSE_VALUE ((uint32_t)8000000)
#define LSE_VALUE ((uint32_t)32768)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
#define BOARD_OVERWRITE_SWD (1)
4 changes: 2 additions & 2 deletions ports/stm/boards/feather_stm32f405_express/mpconfigboard.h
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Expand Up @@ -34,8 +34,8 @@

#define MICROPY_HW_NEOPIXEL (&pin_PC00)

#define BOARD_OSC_DIV (12)
#define HSE_VALUE ((uint32_t)12000000U)
#define HSE_VALUE ((uint32_t)12000000U)
#define LSE_VALUE ((uint32_t)32768)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)

// On-board flash
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5 changes: 2 additions & 3 deletions ports/stm/boards/meowbit_v121/mpconfigboard.h
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Expand Up @@ -35,10 +35,9 @@
#define AUTORESET_DELAY_MS 500
#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)

#define BOARD_OSC_DIV (12)
#define HSE_VALUE ((uint32_t)12000000U)
#define LSE_VALUE ((uint32_t)32000U)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
#define HSE_VALUE ((uint32_t)12000000U)
#define LSE_VALUE ((uint32_t)32000U)

#define BOARD_NO_VBUS_SENSE (1)
#define BOARD_VTOR_DEFER (1) //Leave VTOR relocation to bootloader
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6 changes: 4 additions & 2 deletions ports/stm/boards/nucleo_f746zg/mpconfigboard.h
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Expand Up @@ -33,8 +33,10 @@
#define FLASH_SIZE (0x100000)
#define FLASH_PAGE_SIZE (0x4000)

#define BOARD_OSC_DIV (8)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) // TODO: enable this once LSE is fixed for H7/F7
#define HSE_VALUE ((uint32_t)8000000)
#define LSE_VALUE ((uint32_t)32768)
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)

#define DEBUG_UART_TX (&pin_PD08)
#define DEBUG_UART_RX (&pin_PD09)
6 changes: 4 additions & 2 deletions ports/stm/boards/nucleo_f767zi/mpconfigboard.h
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Expand Up @@ -32,5 +32,7 @@
#define FLASH_SIZE (0x200000)
#define FLASH_PAGE_SIZE (0x4000)

#define BOARD_OSC_DIV (8)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) // TODO: enable this once LSE is fixed for H7/F7
#define HSE_VALUE ((uint32_t)8000000)
#define LSE_VALUE ((uint32_t)32768)
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
6 changes: 4 additions & 2 deletions ports/stm/boards/nucleo_h743zi_2/mpconfigboard.h
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Expand Up @@ -31,5 +31,7 @@

#define FLASH_PAGE_SIZE (0x4000)

#define BOARD_OSC_DIV (8)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) // TODO: enable this once LSE is fixed for H7/F7
#define HSE_VALUE ((uint32_t)8000000)
#define LSE_VALUE ((uint32_t)32768)
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
3 changes: 1 addition & 2 deletions ports/stm/boards/openmv_h7/mpconfigboard.h
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Expand Up @@ -31,6 +31,5 @@

#define FLASH_PAGE_SIZE (0x4000)

#define BOARD_OSC_DIV (12)
#define HSE_VALUE ((uint32_t)12000000)
#define HSE_VALUE ((uint32_t)12000000)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
3 changes: 2 additions & 1 deletion ports/stm/boards/pyb_nano_v2/mpconfigboard.h
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Expand Up @@ -32,7 +32,8 @@
#define FLASH_SIZE (0x80000)
#define FLASH_PAGE_SIZE (0x4000)

#define BOARD_OSC_DIV (8)
#define HSE_VALUE ((uint32_t)8000000)
#define LSE_VALUE ((uint32_t)32768)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)

// On-board flash
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5 changes: 2 additions & 3 deletions ports/stm/boards/pyboard_v11/mpconfigboard.h
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Expand Up @@ -32,10 +32,9 @@
#define FLASH_SIZE (0x100000)
#define FLASH_PAGE_SIZE (0x4000)

#define BOARD_OSC_DIV (12)
#define HSE_VALUE ((uint32_t)12000000)
#define LSE_VALUE ((uint32_t)32000U)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
#define HSE_VALUE ((uint32_t)12000000U)
#define LSE_VALUE ((uint32_t)32000U)

#define DEFAULT_I2C_BUS_SCL (&pin_PB06)
#define DEFAULT_I2C_BUS_SDA (&pin_PB07)
4 changes: 1 addition & 3 deletions ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.h
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Expand Up @@ -32,11 +32,9 @@
#define FLASH_SIZE (0x80000)
#define FLASH_PAGE_SIZE (0x4000)

#define BOARD_OSC_DIV (25)
#define HSE_VALUE ((uint32_t)25000000)
#define BOARD_NO_VBUS_SENSE (1)

#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
#define HSE_VALUE ((uint32_t)25000000U)

// On-board flash
// #define SPI_FLASH_MOSI_PIN (&pin_PA07)
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4 changes: 2 additions & 2 deletions ports/stm/boards/stm32f411ve_discovery/mpconfigboard.h
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Expand Up @@ -32,8 +32,8 @@
#define FLASH_SIZE (0x80000) //512K
#define FLASH_PAGE_SIZE (0x4000) //16K

#define BOARD_OSC_DIV (8)

#define HSE_VALUE ((uint32_t)8000000)
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)

// The schematic has a 32k crystal that isn't fitted. Uncommented the line below if you add it.
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5 changes: 4 additions & 1 deletion ports/stm/boards/stm32f412zg_discovery/mpconfigboard.h
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Expand Up @@ -32,8 +32,11 @@
#define FLASH_SIZE (0x100000)
#define FLASH_PAGE_SIZE (0x4000)

#define BOARD_OSC_DIV (8)
#define HSE_VALUE ((uint32_t)8000000)
#define LSE_VALUE ((uint32_t)32768)
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
#define CPY_CLK_USB_USES_AUDIOPLL (1)

#define DEFAULT_I2C_BUS_SCL (&pin_PB10)
#define DEFAULT_I2C_BUS_SDA (&pin_PB09)
3 changes: 2 additions & 1 deletion ports/stm/boards/stm32f4_discovery/mpconfigboard.h
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Expand Up @@ -32,5 +32,6 @@
#define FLASH_SIZE (0x100000)
#define FLASH_PAGE_SIZE (0x4000)

#define BOARD_OSC_DIV (8)
#define HSE_VALUE ((uint32_t)8000000)
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
15 changes: 9 additions & 6 deletions ports/stm/boards/stm32f746g_discovery/mpconfigboard.h
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Expand Up @@ -34,12 +34,15 @@
#define FLASH_SIZE (0x100000)
#define FLASH_PAGE_SIZE (0x4000)

#define BOARD_OSC_DIV (25)
#define HSE_VALUE ((uint32_t)25000000)
#define BOARD_OSC_PLLN (400)
#define BOARD_OSC_PLLQ (9)
// Lower frequency to allow external RAM use
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Please explain this further. What clock needs to be lower to use external RAM? Why?

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@hierophect hierophect Jun 5, 2020 •
edited
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@tannewt this is @k0d's deal, I don't know much about it. I just edited his macros to match style.

#define HSE_VALUE ((uint32_t)25000000)
#define LSE_VALUE ((uint32_t)32768)
#define CPY_CLK_PLLN (400)
#define CPY_CLK_PLLQ (9)
#define CPY_CLK_FLASH_LATENCY (FLASH_LATENCY_6)
#define CPY_CLK_USB_USES_AUDIOPLL (1)

#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) // TODO: enable this once LSE is fixed for H7/F7
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)

#define BOARD_FLASH_LATENCY FLASH_LATENCY_6
#define BOARD_NO_VBUS_SENSE 1
3 changes: 1 addition & 2 deletions ports/stm/boards/thunderpack/mpconfigboard.h
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Expand Up @@ -40,12 +40,11 @@
#define FLASH_PAGE_SIZE (0x4000)
#define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000)

#define BOARD_OSC_DIV (24)
#define HSE_VALUE ((uint32_t)24000000U)
#define BOARD_OVERWRITE_SWD (1)
#define BOARD_NO_VBUS_SENSE (1)

#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
#define HSE_VALUE ((uint32_t)24000000U)

// Status LEDs
#define MICROPY_HW_LED_STATUS (&pin_PA02)
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120 changes: 120 additions & 0 deletions ports/stm/peripherals/stm32f4/clocks.c
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@@ -0,0 +1,120 @@
/*
* This file is part of the Micro Python project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2020 Lucian Copeland for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/

#include "stm32f4xx_hal.h"
#include "supervisor/shared/safe_mode.h"
#include <stdbool.h>

// F4 Series
#ifdef STM32F401xE
#include "stm32f4/stm32f401xe/clocks.h"
#endif
#ifdef STM32F411xE
#include "stm32f4/stm32f411xe/clocks.h"
#endif
#ifdef STM32F412Zx
#include "stm32f4/stm32f412zx/clocks.h"
#endif
#ifdef STM32F405xx
#include "stm32f4/stm32f405xx/clocks.h"
#endif
#ifdef STM32F407xx
#include "stm32f4/stm32f407xx/clocks.h"
#endif

void stm32_peripherals_clocks_init(void) {
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
bool lse_failure = false;

// Set voltage scaling in accordance with system clock speed
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(CPY_CLK_VSCALE);

// Set up primary PLL and HSE clocks
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
#if (BOARD_HAS_LOW_SPEED_CRYSTAL)
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
#else
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
#endif
RCC_OscInitStruct.HSEState = BOARD_HSE_SOURCE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
RCC_OscInitStruct.PLL.PLLN = CPY_CLK_PLLN;
RCC_OscInitStruct.PLL.PLLP = CPY_CLK_PLLP;
RCC_OscInitStruct.PLL.PLLQ = CPY_CLK_PLLQ;
#if (CPY_CLK_USB_USES_AUDIOPLL)
RCC_OscInitStruct.PLL.PLLR = 2; // Unused but required by HAL
#endif

if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
// Failure likely means a LSE issue - attempt to swap to LSI, and set to crash
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
// No HSE means no USB, so just fail forever
while(1);
}
lse_failure = true;
}

// Configure bus clock sources and divisors
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = CPY_CLK_AHBDIV;
RCC_ClkInitStruct.APB1CLKDivider = CPY_CLK_APB1DIV;
RCC_ClkInitStruct.APB2CLKDivider = CPY_CLK_APB2DIV;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, CPY_CLK_FLASH_LATENCY);

// Set up non-bus peripherals
// TODO: I2S settings go here
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
#if (BOARD_HAS_LOW_SPEED_CRYSTAL)
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
#else
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
#endif
#if (CPY_CLK_USB_USES_AUDIOPLL)
// Not supported by all lines. Should always result in 48M.
PeriphClkInitStruct.PLLI2S.PLLI2SM = HSE_VALUE/1000000;
PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4;
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_CK48;
PeriphClkInitStruct.Clk48ClockSelection = RCC_CK48CLKSOURCE_PLLI2SQ;
#endif

HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);

if (lse_failure) {
reset_into_safe_mode(HARD_CRASH); //TODO: make safe mode category CLOCK_FAULT?
}
}
62 changes: 0 additions & 62 deletions ports/stm/peripherals/stm32f4/stm32f401xe/clocks.c
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