canio: Initial implementation for SAM E5x MCUs

locale/circuitpython.pot

@@ -8,7 +8,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
 "Report-Msgid-Bugs-To: \n"
-"POT-Creation-Date: 2020-09-16 17:07-0700\n"
+"POT-Creation-Date: 2020-09-21 16:45-0500\n"
 "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
 "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
 "Language-Team: LANGUAGE <[email protected]>\n"
@@ -92,7 +92,11 @@ msgstr ""
 msgid "%q must be a tuple of length 2"
 msgstr ""
 
-#: ports/atmel-samd/common-hal/sdioio/SDCard.c
+#: shared-bindings/canio/Match.c
+msgid "%q out of range"
+msgstr ""
+
+#: ports/atmel-samd/common-hal/microcontroller/Pin.c
 msgid "%q pin invalid"
 msgstr ""
 
@@ -280,6 +284,10 @@ msgstr ""
 msgid "All I2C peripherals are in use"
 msgstr ""
 
+#: ports/atmel-samd/common-hal/canio/Listener.c
+msgid "All RX FIFOs in use"
+msgstr ""
+
 #: ports/nrf/common-hal/busio/SPI.c
 msgid "All SPI peripherals are in use"
 msgstr ""
@@ -316,6 +324,10 @@ msgstr ""
 msgid "Already advertising."
 msgstr ""
 
+#: ports/atmel-samd/common-hal/canio/Listener.c
+msgid "Already have all-matches listener"
+msgstr ""
+
 #: shared-module/memorymonitor/AllocationAlarm.c
 #: shared-module/memorymonitor/AllocationSize.c
 msgid "Already running"
@@ -752,7 +764,7 @@ msgstr ""
 msgid "Error in regex"
 msgstr ""
 
-#: shared-bindings/_bleio/__init__.c shared-bindings/aesio/aes.c
+#: py/enum.c shared-bindings/_bleio/__init__.c shared-bindings/aesio/aes.c
 #: shared-bindings/busio/SPI.c shared-bindings/microcontroller/Pin.c
 #: shared-bindings/neopixel_write/__init__.c
 #: shared-bindings/terminalio/Terminal.c
@@ -845,6 +857,10 @@ msgstr ""
 msgid "File exists"
 msgstr ""
 
+#: ports/atmel-samd/common-hal/canio/Listener.c
+msgid "Filters too complex"
+msgstr ""
+
 #: ports/cxd56/common-hal/camera/Camera.c
 msgid "Format not supported"
 msgstr ""
@@ -1127,6 +1143,10 @@ msgstr ""
 msgid "Maximum x value when mirrored is %d"
 msgstr ""
 
+#: shared-bindings/canio/Message.c
+msgid "Messages limited to 8 bytes"
+msgstr ""
+
 #: supervisor/shared/safe_mode.c
 msgid "MicroPython NLR jump failed. Likely memory corruption."
 msgstr ""
@@ -2310,6 +2330,10 @@ msgstr ""
 msgid "exceptions must derive from BaseException"
 msgstr ""
 
+#: shared-bindings/canio/CAN.c shared-bindings/canio/Listener.c
+msgid "expected '%q' but got '%q'"
+msgstr ""
+
 #: py/objstr.c
 msgid "expected ':' after format specifier"
 msgstr ""
@@ -3147,6 +3171,10 @@ msgstr ""
 msgid "source palette too large"
 msgstr ""
 
+#: shared-bindings/canio/Message.c
+msgid "specify size or data, but not both"
+msgstr ""
+
 #: py/objstr.c
 msgid "start/end indices"
 msgstr ""
@@ -3261,7 +3289,7 @@ msgid "tuple/list has wrong length"
 msgstr ""
 
 #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c
-#: shared-bindings/busio/UART.c
+#: shared-bindings/busio/UART.c shared-bindings/canio/CAN.c
 msgid "tx and rx cannot both be None"
 msgstr ""
 

main.c

@@ -81,6 +81,10 @@
 #include "supervisor/shared/bluetooth.h"
 #endif
 
+#if CIRCUITPY_CANIO
+#include "common-hal/canio/CAN.h"
+#endif
+
 void do_str(const char *src, mp_parse_input_kind_t input_kind) {
     mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0);
     if (lex == NULL) {
@@ -226,6 +230,10 @@ void cleanup_after_vm(supervisor_allocation* heap) {
     free_memory(heap);
     supervisor_move_memory();
 
+    #if CIRCUITPY_CANIO
+    common_hal_canio_reset();
+    #endif
+
     reset_port();
     #if CIRCUITPY_BOARD
     reset_board_busses();

ports/atmel-samd/Makefile

@@ -393,6 +393,10 @@ SRC_QSTR += $(HEADER_BUILD)/sdiodata.h
 $(HEADER_BUILD)/sdiodata.h: tools/mksdiodata.py | $(HEADER_BUILD)
 	$(Q)$(PYTHON3) $< > $@
 
+SRC_QSTR += $(HEADER_BUILD)/candata.h
+$(HEADER_BUILD)/candata.h: tools/mkcandata.py | $(HEADER_BUILD)
+	$(Q)$(PYTHON3) $< > $@
+
 SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED)
 # Sources that only hold QSTRs after pre-processing.
 SRC_QSTR_PREPROCESSOR += peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/clocks.c

ports/atmel-samd/asf4_conf/same51/peripheral_clk_config.h

@@ -1165,6 +1165,88 @@
 #define CONF_SDHC1_SLOW_FREQUENCY 12000000
 #endif
 
+// <h> CAN Clock Settings
+// <y> CAN Clock source
+
+// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
+
+// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
+
+// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
+
+// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
+
+// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
+
+// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
+
+// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
+
+// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
+
+// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
+
+// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
+
+// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
+
+// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
+
+// <i> Select the clock source for CAN.
+// <id> sdhc_gclk_selection
+#ifndef CONF_GCLK_CAN0_SRC
+#define CONF_GCLK_CAN0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
+#endif
+
+/**
+ * \def CAN FREQUENCY
+ * \brief CAN's Clock frequency
+ */
+#ifndef CONF_CAN0_FREQUENCY
+#define CONF_CAN0_FREQUENCY 120000000
+#endif
+
+// <h> CAN Clock Settings
+// <y> CAN Clock source
+
+// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
+
+// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
+
+// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
+
+// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
+
+// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
+
+// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
+
+// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
+
+// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
+
+// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
+
+// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
+
+// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
+
+// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
+
+// <i> Select the clock source for CAN.
+// <id> sdhc_gclk_selection
+#ifndef CONF_GCLK_CAN1_SRC
+#define CONF_GCLK_CAN1_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
+#endif
+
+/**
+ * \def CAN FREQUENCY
+ * \brief CAN's Clock frequency
+ */
+#ifndef CONF_CAN1_FREQUENCY
+#define CONF_CAN1_FREQUENCY 120000000
+#endif
+
 // <<< end of configuration section >>>
 
 #endif // PERIPHERAL_CLK_CONFIG_H

ports/atmel-samd/asf4_conf/same54/peripheral_clk_config.h

@@ -1165,6 +1165,88 @@
 #define CONF_SDHC1_SLOW_FREQUENCY 12000000
 #endif
 
+// <h> CAN Clock Settings
+// <y> CAN Clock source
+
+// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
+
+// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
+
+// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
+
+// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
+
+// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
+
+// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
+
+// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
+
+// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
+
+// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
+
+// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
+
+// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
+
+// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
+
+// <i> Select the clock source for CAN.
+// <id> sdhc_gclk_selection
+#ifndef CONF_GCLK_CAN0_SRC
+#define CONF_GCLK_CAN0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
+#endif
+
+/**
+ * \def CAN FREQUENCY
+ * \brief CAN's Clock frequency
+ */
+#ifndef CONF_CAN0_FREQUENCY
+#define CONF_CAN0_FREQUENCY 120000000
+#endif
+
+// <h> CAN Clock Settings
+// <y> CAN Clock source
+
+// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
+
+// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
+
+// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
+
+// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
+
+// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
+
+// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
+
+// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
+
+// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
+
+// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
+
+// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
+
+// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
+
+// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
+
+// <i> Select the clock source for CAN.
+// <id> sdhc_gclk_selection
+#ifndef CONF_GCLK_CAN1_SRC
+#define CONF_GCLK_CAN1_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
+#endif
+
+/**
+ * \def CAN FREQUENCY
+ * \brief CAN's Clock frequency
+ */
+#ifndef CONF_CAN1_FREQUENCY
+#define CONF_CAN1_FREQUENCY 120000000
+#endif
+
 // <<< end of configuration section >>>
 
 #endif // PERIPHERAL_CLK_CONFIG_H

ports/atmel-samd/boards/common.template.ld

@@ -43,6 +43,15 @@ SECTIONS
         _sidata = .;       /* start of .data section */
     } >FLASH_FIRMWARE
 
+    /* Data accessed by the CAN peripheral must be in the first 64kB RAM */
+    /* place it at the very start of RAM, before the .data section */
+    /* it is zeroed by reset_port */
+    .canram (NOLOAD) :
+    {
+        . = ALIGN(4);
+        *(.canram)
+    } > RAM
+
     /* This is the initialized data section
     The program executes knowing that the data is in the RAM
     but the loader puts the initial values in the FLASH_FIRMWARE (inidata).
@@ -61,7 +70,7 @@ SECTIONS
     } >RAM
 
     /* Uninitialized data section */
-    .bss :
+    .bss (NOLOAD) :
     {
         . = ALIGN(4);
         _sbss = .;

ports/atmel-samd/boards/feather_m4_can/mpconfigboard.mk

@@ -12,3 +12,4 @@ EXTERNAL_FLASH_DEVICES = GD25Q16C
 LONGINT_IMPL = MPZ
 
 CIRCUITPY_VECTORIO = 1
+CIRCUITPY_CANIO = 1

ports/atmel-samd/boards/same54_xplained/mpconfigboard.mk

@@ -12,3 +12,4 @@ EXTERNAL_FLASH_DEVICES = "N25Q256A"
 LONGINT_IMPL = MPZ
 
 CIRCUITPY_SDIOIO = 1
+CIRCUITPY_CANIO = 1

ports/atmel-samd/boards/same54_xplained/pins.c

@@ -48,8 +48,9 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
 
     { MP_OBJ_NEW_QSTR(MP_QSTR_QT),  MP_ROM_PTR(&pin_PA16) },
 
-    { MP_OBJ_NEW_QSTR(MP_QSTR_CANRX),  MP_ROM_PTR(&pin_PB12) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_CANTX),  MP_ROM_PTR(&pin_PB13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_RX),  MP_ROM_PTR(&pin_PB13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_TX),  MP_ROM_PTR(&pin_PB12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_STANDBY),  MP_ROM_PTR(&pin_PC13) },
 
     // EXT1 header
     { MP_OBJ_NEW_QSTR(MP_QSTR_PB04),  MP_ROM_PTR(&pin_PB04) },