Add circuitpython support for STM Nucleo-F446RE development board.

ports/stm/boards/STM32F446_fs.ld

@@ -0,0 +1,26 @@
+/*
+    GNU linker script for STM32F446 with filesystem
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)          : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
+    FLASH_ISR (rx)      : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
+    FLASH_FS (rx)       : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
+    FLASH_FIRMWARE (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */
+    RAM (xrw)           : ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 24K;
+_minimum_heap_size = 16K;
+
+/* Define tho top end of the stack.  The stack is full descending so begins just
+   above last byte of RAM.  Note that EABI requires the stack to be 8-byte
+   aligned for a call. */
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_start = ORIGIN(RAM);
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);

ports/stm/boards/nucleo_f446re/board.c

@@ -0,0 +1,29 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022 flom84
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "supervisor/board.h"
+
+// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.

ports/stm/boards/nucleo_f446re/mpconfigboard.h

@@ -0,0 +1,55 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022 flom84
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// Micropython setup
+
+#define MICROPY_HW_BOARD_NAME "NUCLEO F446RE"
+#define MICROPY_HW_MCU_NAME "STM32F446xx"
+
+#define FLASH_SIZE (0x80000u)     // 512K
+#define FLASH_PAGE_SIZE (0x4000u) // 16K
+
+#define HSE_VALUE ((uint32_t)8000000u)
+#define BOARD_HSE_SOURCE (RCC_HSE_ON)
+// The schematic has a 32k crystal that isn't fitted. Uncommented the line below if you add it.
+// #define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
+// #define LSE_VALUE  ((uint32_t)32000U)
+#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
+
+// USART3 + USB FTDI
+// #define CIRCUITPY_CONSOLE_UART_TX (&pin_PC10)
+// #define CIRCUITPY_CONSOLE_UART_RX (&pin_PC11)
+
+// USART2 + ST link
+// #define CIRCUITPY_CONSOLE_UART_TX (&pin_PA02)
+// #define CIRCUITPY_CONSOLE_UART_RX (&pin_PA03)
+
+// Status LEDs
+#define MICROPY_HW_LED_STATUS (&pin_PA05)
+
+#define MICROPY_FATFS_EXFAT 0
+
+#define BOARD_NO_VBUS_SENSE (1)

ports/stm/boards/nucleo_f446re/mpconfigboard.mk

@@ -0,0 +1,35 @@
+USB_VID = 0x0483
+USB_PID = 0x572A
+USB_PRODUCT = "NUCLEO-F446RE - CPy"
+USB_MANUFACTURER = "STMicroelectronics"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+
+MCU_SERIES = F4
+MCU_VARIANT = STM32F446xx
+MCU_PACKAGE = LQFP64
+
+LD_COMMON = boards/common_default.ld
+LD_FILE = boards/STM32F446_fs.ld
+
+# Too big for the flash
+CIRCUITPY_AUDIOCORE = 0
+CIRCUITPY_AUDIOPWMIO = 0
+CIRCUITPY_BITMAPTOOLS = 0
+CIRCUITPY_BLEIO_HCI = 0
+CIRCUITPY_VECTORIO = 0
+CIRCUITPY_TOUCHIO = 0
+CIRCUITPY_RAINBOWIO = 0
+CIRCUITPY_USB_HID = 0
+CIRCUITPY_USB_MIDI = 0
+CIRCUITPY_JSON = 0
+# Requires neopixel_write or SPI (dotstar)
+CIRCUITPY_PIXELBUF = 0
+# No requirements, but takes extra flash
+CIRCUITPY_ULAB = 0
+CIRCUITPY_GAMEPADSHIFT  = 0
+CIRCUITPY_BITBANGIO = 0
+CIRCUITPY_NEOPIXEL_WRITE = 0
+CIRCUITPY_SDCARDIO = 0
+CIRCUITPY_DISPLAYIO = 0
+CIRCUITPY_KEYPAD = 0

ports/stm/boards/nucleo_f446re/pins.c

@@ -0,0 +1,78 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
+    {MP_ROM_QSTR(MP_QSTR_ID), MP_ROM_PTR(&board_module_id_obj)},
+    {MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA03)},
+    {MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA02)},
+    {MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA10)},
+    {MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB03)},
+    {MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB05)},
+    {MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB04)},
+    {MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB10)},
+    {MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA08)},
+    {MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA09)},
+    {MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PC07)},
+    {MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB06)},
+    {MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA07)},
+    {MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA06)},
+    {MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA05)},
+    {MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB09)},
+    {MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PB08)},
+    {MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00)},
+    {MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01)},
+    {MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04)},
+    {MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB00)},
+    {MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC01)},
+    {MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC00)},
+    {MP_ROM_QSTR(MP_QSTR_PA0), MP_ROM_PTR(&pin_PA00)},
+    {MP_ROM_QSTR(MP_QSTR_PA1), MP_ROM_PTR(&pin_PA01)},
+    {MP_ROM_QSTR(MP_QSTR_PA2), MP_ROM_PTR(&pin_PA02)},
+    {MP_ROM_QSTR(MP_QSTR_PA3), MP_ROM_PTR(&pin_PA03)},
+    {MP_ROM_QSTR(MP_QSTR_PA4), MP_ROM_PTR(&pin_PA04)},
+    {MP_ROM_QSTR(MP_QSTR_PA5), MP_ROM_PTR(&pin_PA05)},
+    {MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_PA06)},
+    {MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_PA07)},
+    {MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_PA08)},
+    {MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_PA09)},
+    {MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10)},
+    {MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11)},
+    {MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12)},
+    {MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15)},
+    {MP_ROM_QSTR(MP_QSTR_PB0), MP_ROM_PTR(&pin_PB00)},
+    {MP_ROM_QSTR(MP_QSTR_PB1), MP_ROM_PTR(&pin_PB01)},
+    {MP_ROM_QSTR(MP_QSTR_PB2), MP_ROM_PTR(&pin_PB02)},
+    {MP_ROM_QSTR(MP_QSTR_PB3), MP_ROM_PTR(&pin_PB03)},
+    {MP_ROM_QSTR(MP_QSTR_PB4), MP_ROM_PTR(&pin_PB04)},
+    {MP_ROM_QSTR(MP_QSTR_PB5), MP_ROM_PTR(&pin_PB05)},
+    {MP_ROM_QSTR(MP_QSTR_PB6), MP_ROM_PTR(&pin_PB06)},
+    {MP_ROM_QSTR(MP_QSTR_PB7), MP_ROM_PTR(&pin_PB07)},
+    {MP_ROM_QSTR(MP_QSTR_PB8), MP_ROM_PTR(&pin_PB08)},
+    {MP_ROM_QSTR(MP_QSTR_PB9), MP_ROM_PTR(&pin_PB09)},
+    {MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10)},
+    {MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12)},
+    {MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13)},
+    {MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14)},
+    {MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15)},
+    {MP_ROM_QSTR(MP_QSTR_PC0), MP_ROM_PTR(&pin_PC00)},
+    {MP_ROM_QSTR(MP_QSTR_PC1), MP_ROM_PTR(&pin_PC01)},
+    {MP_ROM_QSTR(MP_QSTR_PC2), MP_ROM_PTR(&pin_PC02)},
+    {MP_ROM_QSTR(MP_QSTR_PC3), MP_ROM_PTR(&pin_PC03)},
+    {MP_ROM_QSTR(MP_QSTR_PC4), MP_ROM_PTR(&pin_PC04)},
+    {MP_ROM_QSTR(MP_QSTR_PC5), MP_ROM_PTR(&pin_PC05)},
+    {MP_ROM_QSTR(MP_QSTR_PC6), MP_ROM_PTR(&pin_PC06)},
+    {MP_ROM_QSTR(MP_QSTR_PC7), MP_ROM_PTR(&pin_PC07)},
+    {MP_ROM_QSTR(MP_QSTR_PC8), MP_ROM_PTR(&pin_PC08)},
+    {MP_ROM_QSTR(MP_QSTR_PC9), MP_ROM_PTR(&pin_PC09)},
+    {MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10)},
+    {MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11)},
+    {MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12)},
+    {MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13)},
+    {MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14)},
+    {MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15)},
+    {MP_ROM_QSTR(MP_QSTR_PD2), MP_ROM_PTR(&pin_PD02)},
+    {MP_ROM_QSTR(MP_QSTR_PH0), MP_ROM_PTR(&pin_PH00)},
+    {MP_ROM_QSTR(MP_QSTR_PH1), MP_ROM_PTR(&pin_PH01)},
+    {MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA05)},
+    {MP_ROM_QSTR(MP_QSTR_SW), MP_ROM_PTR(&pin_PC13)},
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

ports/stm/peripherals/periph.h

@@ -119,6 +119,13 @@ typedef struct {
 #include "stm32f4/stm32f407xx/periph.h"
 #endif
 
+#ifdef STM32F446xx
+#define HAS_DAC 0
+#define HAS_TRNG 0
+#define HAS_BASIC_TIM 0
+#include "stm32f4/stm32f446xx/periph.h"
+#endif
+
 // F7 Series
 
 #ifdef STM32F746xx

ports/stm/peripherals/pins.h

@@ -97,6 +97,9 @@ extern const mp_obj_type_t mcu_pin_type;
 #ifdef STM32F407xx
 #include "stm32f4/stm32f407xx/pins.h"
 #endif
+#ifdef STM32F446xx
+#include "stm32f4/stm32f446xx/pins.h"
+#endif
 
 // F7 Series
 #ifdef STM32F746xx

ports/stm/peripherals/stm32f4/clocks.c

@@ -47,11 +47,14 @@
 #ifdef STM32F407xx
 #include "stm32f4/stm32f407xx/clocks.h"
 #endif
+#ifdef STM32F446xx
+#include "stm32f4/stm32f446xx/clocks.h"
+#endif
 
 void stm32_peripherals_clocks_init(void) {
-    RCC_ClkInitTypeDef RCC_ClkInitStruct;
-    RCC_OscInitTypeDef RCC_OscInitStruct;
-    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 
     // Set voltage scaling in accordance with system clock speed
     __HAL_RCC_PWR_CLK_ENABLE();

ports/stm/peripherals/stm32f4/stm32f446xx/clocks.h

@@ -0,0 +1,66 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022 flom84
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "stm32f4xx_hal.h"
+
+// Chip:                STM32F446xC/xV
+// Line Type:           Access Line
+// Speed:               168MHz (max 180MHz)
+
+// Defaults:
+#ifndef CPY_CLK_VSCALE
+#define CPY_CLK_VSCALE (PWR_REGULATOR_VOLTAGE_SCALE1)
+#endif
+#ifndef CPY_CLK_PLLM
+#define CPY_CLK_PLLM (8)
+#endif
+#ifndef CPY_CLK_PLLN
+#define CPY_CLK_PLLN (336)
+#endif
+#ifndef CPY_CLK_PLLP
+#define CPY_CLK_PLLP (RCC_PLLP_DIV2)
+#endif
+#ifndef CPY_CLK_PLLQ
+#define CPY_CLK_PLLQ (7)
+#endif
+#ifndef CPY_CLK_AHBDIV
+#define CPY_CLK_AHBDIV (RCC_SYSCLK_DIV1)
+#endif
+#ifndef CPY_CLK_APB1DIV
+#define CPY_CLK_APB1DIV (RCC_HCLK_DIV4)
+#endif
+#ifndef CPY_CLK_APB2DIV
+#define CPY_CLK_APB2DIV (RCC_HCLK_DIV2)
+#endif
+#ifndef CPY_CLK_FLASH_LATENCY
+#define CPY_CLK_FLASH_LATENCY (FLASH_LATENCY_5)
+#endif
+#ifndef CPY_CLK_USB_USES_AUDIOPLL
+#define CPY_CLK_USB_USES_AUDIOPLL (0)
+#endif
+#ifndef BOARD_HSE_SOURCE
+#define BOARD_HSE_SOURCE (RCC_HSE_ON)
+#endif

ports/stm/peripherals/stm32f4/stm32f446xx/gpio.c

@@ -0,0 +1,47 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022 flom84
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "peripherals/gpio.h"
+#include "stm32f4xx_hal.h"
+#include "common-hal/microcontroller/Pin.h"
+
+void stm32_peripherals_gpio_init(void) {
+    // * GPIO Ports Clock Enable */
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOH_CLK_ENABLE();
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+
+    // Never reset pins
+    never_reset_pin_number(2, 13); // PC13 anti tamp
+    never_reset_pin_number(2, 14); // PC14 OSC32_IN
+    never_reset_pin_number(2, 15); // PC15 OSC32_OUT
+    never_reset_pin_number(0, 13); // PA13 SWDIO
+    never_reset_pin_number(0, 14); // PA14 SWCLK
+}
+
+void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) {
+}