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author
iclsrc
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Merge from 'sycl' to 'sycl-web'
2 parents 0b61f04 + 8a45134 commit 1137134

39 files changed

+378
-76
lines changed

‎llvm-spirv/lib/SPIRV/OCLUtil.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -483,6 +483,14 @@ class OCLBuiltinFuncMangleInfo : public SPIRV::BuiltinFuncMangleInfo {
483483
addUnsignedArg(0);
484484
setEnumArg(1, SPIR::PRIMITIVE_MEMORY_ORDER);
485485
setEnumArg(2, SPIR::PRIMITIVE_MEMORY_SCOPE);
486+
} else if (UnmangledName.find("atom_") == 0) {
487+
setArgAttr(0, SPIR::ATTR_VOLATILE);
488+
if (UnmangledName.find("atom_umax") == 0 ||
489+
UnmangledName.find("atom_umin") == 0) {
490+
addUnsignedArg(0);
491+
addUnsignedArg(1);
492+
UnmangledName.erase(5, 1);
493+
}
486494
} else if (UnmangledName.find("atomic") == 0) {
487495
setArgAttr(0, SPIR::ATTR_VOLATILE);
488496
if (UnmangledName.find("atomic_umax") == 0 ||

‎llvm-spirv/lib/SPIRV/PreprocessMetadata.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -214,6 +214,11 @@ void PreprocessMetadata::visit(Module *M) {
214214
.done();
215215
}
216216

217+
// !{void (i32 addrspace(1)*)* @kernel, i32 no_global_work_offset}
218+
if (Kernel.getMetadata(kSPIR2MD::NoGlobalOffset)) {
219+
EM.addOp().add(&Kernel).add(spv::ExecutionModeNoGlobalOffsetINTEL).done();
220+
}
221+
217222
// !{void (i32 addrspace(1)*)* @kernel, i32 max_global_work_dim, i32 dim}
218223
if (MDNode *MaxWorkDimINTEL = Kernel.getMetadata(kSPIR2MD::MaxWGDim)) {
219224
EM.addOp()

‎llvm-spirv/lib/SPIRV/SPIRVInternal.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -376,6 +376,7 @@ const static char WGSize[] = "reqd_work_group_size";
376376
const static char WGSizeHint[] = "work_group_size_hint";
377377
const static char SubgroupSize[] = "intel_reqd_sub_group_size";
378378
const static char MaxWGSize[] = "max_work_group_size";
379+
const static char NoGlobalOffset[] = "no_global_work_offset";
379380
const static char MaxWGDim[] = "max_global_work_dim";
380381
const static char NumSIMD[] = "num_simd_work_items";
381382
} // namespace kSPIR2MD

‎llvm-spirv/lib/SPIRV/SPIRVReader.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3285,6 +3285,10 @@ bool SPIRVToLLVM::transKernelMetadata() {
32853285
F->setMetadata(kSPIR2MD::MaxWGSize,
32863286
getMDNodeStringIntVec(Context, EM->getLiterals()));
32873287
}
3288+
// Generate metadata for no_global_work_offset
3289+
if (BF->getExecutionMode(ExecutionModeNoGlobalOffsetINTEL)) {
3290+
F->setMetadata(kSPIR2MD::NoGlobalOffset, MDNode::get(*Context, {}));
3291+
}
32883292
// Generate metadata for max_global_work_dim
32893293
if (auto EM = BF->getExecutionMode(ExecutionModeMaxWorkDimINTEL)) {
32903294
F->setMetadata(kSPIR2MD::MaxWGDim,

‎llvm-spirv/lib/SPIRV/SPIRVRegularizeLLVM.cpp

Lines changed: 64 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,7 @@
4949
#include "llvm/Support/Debug.h"
5050

5151
#include <set>
52+
#include <vector>
5253

5354
using namespace llvm;
5455
using namespace SPIRV;
@@ -112,17 +113,18 @@ bool SPIRVRegularizeLLVM::regularize() {
112113
continue;
113114
}
114115

115-
for (auto BI = F->begin(), BE = F->end(); BI != BE; ++BI) {
116-
for (auto II = BI->begin(), IE = BI->end(); II != IE; ++II) {
117-
if (auto Call = dyn_cast<CallInst>(II)) {
116+
std::vector<Instruction *> ToErase;
117+
for (BasicBlock &BB : *F) {
118+
for (Instruction &II : BB) {
119+
if (auto Call = dyn_cast<CallInst>(&II)) {
118120
Call->setTailCall(false);
119121
Function *CF = Call->getCalledFunction();
120122
if (CF && CF->isIntrinsic())
121123
removeFnAttr(Call, Attribute::NoUnwind);
122124
}
123125

124126
// Remove optimization info not supported by SPIRV
125-
if (auto BO = dyn_cast<BinaryOperator>(II)) {
127+
if (auto BO = dyn_cast<BinaryOperator>(&II)) {
126128
if (isa<PossiblyExactOperator>(BO) && BO->isExact())
127129
BO->setIsExact(false);
128130
}
@@ -133,12 +135,68 @@ bool SPIRVRegularizeLLVM::regularize() {
133135
"range",
134136
};
135137
for (auto &MDName : MDs) {
136-
if (II->getMetadata(MDName)) {
137-
II->setMetadata(MDName, nullptr);
138+
if (II.getMetadata(MDName)) {
139+
II.setMetadata(MDName, nullptr);
138140
}
139141
}
142+
if (auto Cmpxchg = dyn_cast<AtomicCmpXchgInst>(&II)) {
143+
Value *Ptr = Cmpxchg->getPointerOperand();
144+
// To get memory scope argument we might use Cmpxchg->getSyncScopeID()
145+
// but LLVM's cmpxchg instruction is not aware of OpenCL(or SPIR-V)
146+
// memory scope enumeration. And assuming the produced SPIR-V module
147+
// will be consumed in an OpenCL environment, we can use the same
148+
// memory scope as OpenCL atomic functions that do not have
149+
// memory_scope argument, i.e. memory_scope_device. See the OpenCL C
150+
// specification p6.13.11. Atomic Functions
151+
Value *MemoryScope = getInt32(M, spv::ScopeDevice);
152+
auto SuccessOrder = static_cast<OCLMemOrderKind>(
153+
llvm::toCABI(Cmpxchg->getSuccessOrdering()));
154+
auto FailureOrder = static_cast<OCLMemOrderKind>(
155+
llvm::toCABI(Cmpxchg->getFailureOrdering()));
156+
Value *EqualSem = getInt32(M, OCLMemOrderMap::map(SuccessOrder));
157+
Value *UnequalSem = getInt32(M, OCLMemOrderMap::map(FailureOrder));
158+
Value *Val = Cmpxchg->getNewValOperand();
159+
Value *Comparator = Cmpxchg->getCompareOperand();
160+
161+
llvm::Value *Args[] = {Ptr, MemoryScope, EqualSem,
162+
UnequalSem, Val, Comparator};
163+
auto *Res = addCallInstSPIRV(M, "__spirv_AtomicCompareExchange",
164+
Cmpxchg->getCompareOperand()->getType(),
165+
Args, nullptr, &II, "cmpxchg.res");
166+
// cmpxchg LLVM instruction returns a pair: the original value and
167+
// a flag indicating success (true) or failure (false).
168+
// OpAtomicCompareExchange SPIR-V instruction returns only the
169+
// original value. So we replace all uses of the original value
170+
// extracted from the pair with the result of OpAtomicCompareExchange
171+
// instruction. And we replace all uses of the flag with result of an
172+
// OpIEqual instruction. The OpIEqual instruction returns true if the
173+
// original value equals to the comparator which matches with
174+
// semantics of cmpxchg.
175+
for (User *U : Cmpxchg->users()) {
176+
if (auto *Extract = dyn_cast<ExtractValueInst>(U)) {
177+
if (Extract->getIndices()[0] == 0) {
178+
Extract->replaceAllUsesWith(Res);
179+
} else if (Extract->getIndices()[0] == 1) {
180+
auto *Cmp = new ICmpInst(Extract, CmpInst::ICMP_EQ, Res,
181+
Comparator, "cmpxchg.success");
182+
Extract->replaceAllUsesWith(Cmp);
183+
} else {
184+
llvm_unreachable("Unxpected cmpxchg pattern");
185+
}
186+
assert(Extract->user_empty());
187+
Extract->dropAllReferences();
188+
ToErase.push_back(Extract);
189+
}
190+
}
191+
if (Cmpxchg->user_empty())
192+
ToErase.push_back(Cmpxchg);
193+
}
140194
}
141195
}
196+
for (Instruction *V : ToErase) {
197+
assert(V->user_empty());
198+
V->eraseFromParent();
199+
}
142200
}
143201

144202
std::string Err;

‎llvm-spirv/lib/SPIRV/SPIRVToLLVMDbgTran.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -113,8 +113,7 @@ SPIRVToLLVMDbgTran::transCompileUnit(const SPIRVExtInst *DebugInst) {
113113

114114
using namespace SPIRVDebug::Operand::CompilationUnit;
115115
assert(Ops.size() == OperandCount && "Invalid number of operands");
116-
M->addModuleFlag(llvm::Module::Warning, "Dwarf Version",
117-
Ops[DWARFVersionIdx]);
116+
M->addModuleFlag(llvm::Module::Max, "Dwarf Version", Ops[DWARFVersionIdx]);
118117
SPIRVExtInst *Source = BM->get<SPIRVExtInst>(Ops[SourceIdx]);
119118
SPIRVId FileId = Source->getArguments()[SPIRVDebug::Operand::Source::FileIdx];
120119
std::string File = getString(FileId);

‎llvm-spirv/lib/SPIRV/SPIRVWriter.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2119,6 +2119,14 @@ bool LLVMToSPIRV::transExecutionMode() {
21192119
BM->addCapability(CapabilityKernelAttributesINTEL);
21202120
}
21212121
} break;
2122+
case spv::ExecutionModeNoGlobalOffsetINTEL: {
2123+
if (BM->isAllowedToUseExtension(
2124+
ExtensionID::SPV_INTEL_kernel_attributes)) {
2125+
BF->addExecutionMode(BM->add(
2126+
new SPIRVExecutionMode(BF, static_cast<ExecutionMode>(EMode))));
2127+
BM->addCapability(CapabilityKernelAttributesINTEL);
2128+
}
2129+
} break;
21222130
case spv::ExecutionModeVecTypeHint:
21232131
case spv::ExecutionModeSubgroupSize:
21242132
case spv::ExecutionModeSubgroupsPerWorkgroup: {

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVIsValidEnum.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -141,6 +141,7 @@ inline bool isValid(spv::ExecutionMode V) {
141141
case ExecutionModeSubgroupSize:
142142
case ExecutionModeSubgroupsPerWorkgroup:
143143
case ExecutionModeMaxWorkgroupSizeINTEL:
144+
case ExecutionModeNoGlobalOffsetINTEL:
144145
case ExecutionModeMaxWorkDimINTEL:
145146
case ExecutionModeNumSIMDWorkitemsINTEL:
146147
return true;

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,7 @@ template <> inline void SPIRVMap<ExecutionMode, std::string>::init() {
120120
add(ExecutionModeVecTypeHint, "VecTypeHint");
121121
add(ExecutionModeContractionOff, "ContractionOff");
122122
add(ExecutionModeMaxWorkgroupSizeINTEL, "MaxWorkgroupSizeINTEL");
123+
add(ExecutionModeNoGlobalOffsetINTEL, "NoGlobalOffsetINTEL");
123124
add(ExecutionModeMaxWorkDimINTEL, "MaxWorkDimINTEL");
124125
add(ExecutionModeNumSIMDWorkitemsINTEL, "NumSIMDWorkitemsINTEL");
125126
}

‎llvm-spirv/test/AtomicCompareExchange.ll

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,50 @@
1+
; RUN: llvm-as < %s -o %t.bc
2+
; RUN: llvm-spirv %t.bc -o %t.spv
3+
; RUN: llvm-spirv -to-text %t.spv -o - | FileCheck %s --check-prefix=CHECK-SPIRV
4+
; RUN: spirv-val %t.spv
5+
6+
; CHECK-SPIRV: TypeInt [[Int:[0-9]+]] 32 0
7+
; CHECK-SPIRV: Constant [[Int]] [[MemScope_Device:[0-9]+]] 1
8+
; CHECK-SPIRV: Constant [[Int]] [[MemSemEqual_SeqCst:[0-9]+]] 16
9+
; CHECK-SPIRV: Constant [[Int]] [[MemSemUnequal_Acquire:[0-9]+]] 2
10+
11+
; CHECK-SPIRV: FunctionParameter {{[0-9]+}} [[Pointer:[0-9]+]]
12+
; CHECK-SPIRV: FunctionParameter {{[0-9]+}} [[Value_ptr:[0-9]+]]
13+
; CHECK-SPIRV: FunctionParameter {{[0-9]+}} [[Comparator:[0-9]+]]
14+
15+
; CHECK-SPIRV: Load [[Int]] [[Value:[0-9]+]] [[Value_ptr]]
16+
; CHECK-SPIRV: AtomicCompareExchange [[Int]] [[Res:[0-9]+]] [[Pointer]] [[MemScope_Device]]
17+
; CHECK-SPIRV-SAME: [[MemSemEqual_SeqCst]] [[MemSemUnequal_Acquire]] [[Value]] [[Comparator]]
18+
; CHECK-SPIRV: IEqual {{[0-9]+}} [[Success:[0-9]+]] [[Res]] [[Comparator]]
19+
; CHECK-SPIRV: BranchConditional [[Success]]
20+
21+
; CHECK-SPIRV: Store [[Value_ptr]] [[Res]]
22+
23+
target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
24+
target triple = "spir"
25+
26+
; Function Attrs: nounwind
27+
define dso_local spir_func void @test(i32* %ptr, i32* %value_ptr, i32 %comparator) local_unnamed_addr #0 {
28+
entry:
29+
%0 = load i32, i32* %value_ptr, align 4
30+
%1 = cmpxchg i32* %ptr, i32 %comparator, i32 %0 seq_cst acquire
31+
%2 = extractvalue { i32, i1 } %1, 1
32+
br i1 %2, label %cmpxchg.continue, label %cmpxchg.store_expected
33+
34+
cmpxchg.store_expected: ; preds = %entry
35+
%3 = extractvalue { i32, i1 } %1, 0
36+
store i32 %3, i32* %value_ptr, align 4
37+
br label %cmpxchg.continue
38+
39+
cmpxchg.continue: ; preds = %cmpxchg.store_expected, %entry
40+
ret void
41+
}
42+
43+
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
44+
attributes #1 = { nounwind }
45+
46+
!llvm.module.flags = !{!0}
47+
!llvm.ident = !{!1}
48+
49+
!0 = !{i32 1, !"wchar_size", i32 4}
50+
!1 = !{!"clang version 11.0.0 (https://github.com/llvm/llvm-project.git cfebd7774229885e7ec88ae9ef1f4ae819cce1d2)"}

‎llvm-spirv/test/DebugInfo/Generic/version.ll

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,13 +3,16 @@
33
; RUN: llvm-as < %s -o %t.bc
44
; RUN: llvm-spirv %t.bc -o %t.spv -spirv-mem2reg=false
55
; RUN: llvm-spirv -r %t.spv -o - | llvm-dis -o %t.ll
6+
; RUN: FileCheck < %t.ll %s --check-prefix=CHECK-LLVM
67

78
; RUN: llc -mtriple=%triple -O0 -filetype=obj < %t.ll > %t
89
; RUN: llvm-dwarfdump %t | FileCheck %s
910

1011
; Make sure we are generating DWARF version 3 when module flag says so.
1112
; CHECK: Compile Unit: length = {{.*}} version = 0x0003
1213

14+
; CHECK-LLVM: !{i32 7, !"Dwarf Version", i32 3}
15+
1316
define i32 @main() #0 !dbg !4 {
1417
entry:
1518
%retval = alloca i32, align 4

‎llvm-spirv/test/DebugInfo/X86/dbg-value-range.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -60,7 +60,7 @@ declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
6060
;CHECK-NEXT: .quad [[CLOBBER_OFF]]
6161
;CHECK-NEXT: .short 1 ## Loc expr size
6262
;CHECK-NEXT: .byte 85 ## DW_OP_reg
63-
;CHECK-NEXT: .quad 0
63+
;CHECK: .quad 0
6464
;CHECK-NEXT: .quad 0
6565
!24 = !{i32 1, !"Debug Info Version", i32 3}
6666
target triple = "spir64-unknown-unknown"

‎llvm-spirv/test/DebugInfo/X86/xray-split-dwarf-interaction.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@
2929
; `a::b()` is actually associated with the function's symbol instead of the
3030
; .debug_types.dwo section.
3131
;
32-
; CHECK-ASM: xray_fn_idx,"awo",@progbits,_ZN1a1bEv,unique,1
32+
; CHECK-ASM: xray_fn_idx,"awo",@progbits,_ZN1a1bEv{{$}}
3333
;
3434
; CHECK-ELF-DAG: [[FSECT:[0-9]+]]] .text._ZN1a1bEv PROGBITS
3535
; CHECK-ELF-DAG: [{{.*}}] .debug_types.dwo PROGBITS

‎llvm-spirv/test/IntelFPGAFunctionAttributes.ll

Lines changed: 34 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,8 @@
11
;; Can be compiled using https://github.com/intel/llvm SYCL compiler from:
22
;; class Foo {
33
;; public:
4-
;; [[intelfpga::max_global_work_dim(1),
4+
;; [[intelfpga::no_global_work_offset,
5+
;; intelfpga::max_global_work_dim(1),
56
;; intelfpga::max_work_group_size(1,1,1),
67
;; intelfpga::num_simd_work_items(8)]] void operator()() {}
78
;; };
@@ -14,6 +15,7 @@
1415
;; void bar() {
1516
;; Foo boo;
1617
;; kernel<class kernel_name>(boo);
18+
;; kernel<class kernel_name2>([]() [[intelfpga::no_global_work_offset(0)]]{});
1719
;; }
1820

1921
; RUN: llvm-as %s -o %t.bc
@@ -31,10 +33,13 @@
3133
; CHECK-SPIRV: 2 Capability FPGAKernelAttributesINTEL
3234
; CHECK-SPIRV: 6 ExecutionMode [[FUNCENTRY:[0-9]+]] 5893 1 1 1
3335
; CHECK-SPIRV: 4 ExecutionMode [[FUNCENTRY]] 5894 1
36+
; CHECK-SPIRV: 3 ExecutionMode [[FUNCENTRY]] 5895
3437
; CHECK-SPIRV: 4 ExecutionMode [[FUNCENTRY]] 5896 8
3538
; CHECK-SPIRV: 5 Function {{.*}} [[FUNCENTRY]] {{.*}}
3639

37-
; CHECK-LLVM: define spir_kernel void {{.*}}kernel_name() {{.*}} !max_work_group_size ![[MAXWG:[0-9]+]] !max_global_work_dim ![[MAXWD:[0-9]+]] !num_simd_work_items ![[NUMSIMD:[0-9]+]]
40+
; CHECK-LLVM: define spir_kernel void {{.*}}kernel_name() {{.*}} !max_work_group_size ![[MAXWG:[0-9]+]] !no_global_work_offset ![[OFFSET:[0-9]+]] !max_global_work_dim ![[MAXWD:[0-9]+]] !num_simd_work_items ![[NUMSIMD:[0-9]+]]
41+
; CHECK-LLVM-NOT: define spir_kernel void {{.*}}kernel_name2 {{.*}} !no_global_work_offset {{.*}}
42+
; CHECK-LLVM: ![[OFFSET]] = !{}
3843
; CHECK-LLVM: ![[MAXWG]] = !{i32 1, i32 1, i32 1}
3944
; CHECK-LLVM: ![[MAXWD]] = !{i32 1}
4045
; CHECK-LLVM: ![[NUMSIMD]] = !{i32 8}
@@ -45,19 +50,20 @@ target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
4550
target triple = "spir64-unknown-linux-sycldevice"
4651

4752
%class._ZTS3Foo.Foo = type { i8 }
53+
%"class._ZTSZ3barvE3$_0.anon" = type { i8 }
4854

4955
$_ZN3FooclEv = comdat any
5056

5157
; Function Attrs: nounwind
52-
define spir_kernel void @_ZTSZ3barvE11kernel_name() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 !num_simd_work_items !5 !max_work_group_size !6 !max_global_work_dim !7 {
58+
define spir_kernel void @_ZTSZ3barvE11kernel_name() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 !num_simd_work_items !5 !max_work_group_size !6 !max_global_work_dim !7 !no_global_work_offset !4 {
5359
entry:
5460
%Foo = alloca %class._ZTS3Foo.Foo, align 1
5561
%0 = bitcast %class._ZTS3Foo.Foo* %Foo to i8*
56-
call void @llvm.lifetime.start.p0i8(i64 1, i8* %0) #3
62+
call void @llvm.lifetime.start.p0i8(i64 1, i8* %0) #4
5763
%1 = addrspacecast %class._ZTS3Foo.Foo* %Foo to %class._ZTS3Foo.Foo addrspace(4)*
5864
call spir_func void @_ZN3FooclEv(%class._ZTS3Foo.Foo addrspace(4)* %1)
5965
%2 = bitcast %class._ZTS3Foo.Foo* %Foo to i8*
60-
call void @llvm.lifetime.end.p0i8(i64 1, i8* %2) #3
66+
call void @llvm.lifetime.end.p0i8(i64 1, i8* %2) #4
6167
ret void
6268
}
6369

@@ -75,11 +81,32 @@ entry:
7581

7682
; Function Attrs: argmemonly nounwind willreturn
7783
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
84+
; Function Attrs: nounwind
85+
define spir_kernel void @_ZTSZ3barvE12kernel_name2() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
86+
entry:
87+
%0 = alloca %"class._ZTSZ3barvE3$_0.anon", align 1
88+
%1 = bitcast %"class._ZTSZ3barvE3$_0.anon"* %0 to i8*
89+
call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #4
90+
%2 = addrspacecast %"class._ZTSZ3barvE3$_0.anon"* %0 to %"class._ZTSZ3barvE3$_0.anon" addrspace(4)*
91+
call spir_func void @"_ZZ3barvENK3$_0clEv"(%"class._ZTSZ3barvE3$_0.anon" addrspace(4)* %2)
92+
%3 = bitcast %"class._ZTSZ3barvE3$_0.anon"* %0 to i8*
93+
call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4
94+
ret void
95+
}
96+
; Function Attrs: inlinehint nounwind
97+
define internal spir_func void @"_ZZ3barvENK3$_0clEv"(%"class._ZTSZ3barvE3$_0.anon" addrspace(4)* %this) #3 align 2 {
98+
entry:
99+
%this.addr = alloca %"class._ZTSZ3barvE3$_0.anon" addrspace(4)*, align 8
100+
store %"class._ZTSZ3barvE3$_0.anon" addrspace(4)* %this, %"class._ZTSZ3barvE3$_0.anon" addrspace(4)** %this.addr, align 8, !tbaa !8
101+
%this1 = load %"class._ZTSZ3barvE3$_0.anon" addrspace(4)*, %"class._ZTSZ3barvE3$_0.anon" addrspace(4)** %this.addr, align 8
102+
ret void
103+
}
78104

79105
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "sycl-module-id"="kernel-attrs.cpp" "uniform-work-group-size"="true" "unsafe-fp-math"="false" "use-soft-float"="false" }
80106
attributes #1 = { argmemonly nounwind willreturn }
81107
attributes #2 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
82-
attributes #3 = { nounwind }
108+
attributes #3 = { inlinehint nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
109+
attributes #4 = { nounwind }
83110

84111
!llvm.module.flags = !{!0}
85112
!opencl.spir.version = !{!1}
@@ -89,7 +116,7 @@ attributes #3 = { nounwind }
89116
!0 = !{i32 1, !"wchar_size", i32 4}
90117
!1 = !{i32 1, i32 2}
91118
!2 = !{i32 4, i32 100000}
92-
!3 = !{!"clang version 10.0.0"}
119+
!3 = !{!"clang version 11.0.0"}
93120
!4 = !{}
94121
!5 = !{i32 8}
95122
!6 = !{i32 1, i32 1, i32 1}

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