Updated to split xtensa_lx6 and xtensa_lx6_rt

Cargo.toml

@@ -29,13 +29,15 @@ mem=[]
 [dependencies]
 esp32-hal-proc-macros = { path = "procmacros" }
 
-xtensa-lx6-rt = { version = "0.1.0" }
+xtensa-lx6-rt = { version = "0.2.0" }
+xtensa-lx6 = { version = "0.1.0" }
 esp32 = { version = "0.4.0" }
 bare-metal = "0.2"
 nb = "0.1.2"
 spin = "0.5.2"
 embedded-hal = { version = "0.2.3", features = ["unproven"] }
 linked_list_allocator = { version = "0.8.4", optional = true, default-features = false, features = ["alloc_ref"] }
+void = { version = "1.0.2", default-features = false }
 
 [dev-dependencies]
 panic-halt = "0.2.0"

LICENSE-APACHE

@@ -0,0 +1,201 @@
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LICENSE-MIT

@@ -0,0 +1,25 @@
+Copyright 2019-2020 Contributors to xtensa-lx6-rt
+
+Permission is hereby granted, free of charge, to any
+person obtaining a copy of this software and associated
+documentation files (the "Software"), to deal in the
+Software without restriction, including without
+limitation the rights to use, copy, modify, merge,
+publish, distribute, sublicense, and/or sell copies of
+the Software, and to permit persons to whom the Software
+is furnished to do so, subject to the following
+conditions:
+
+The above copyright notice and this permission notice
+shall be included in all copies or substantial portions
+of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF
+ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
+TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
+SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
+IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+DEALINGS IN THE SOFTWARE.

examples/blinky.rs

@@ -6,7 +6,7 @@ extern crate panic_halt;
 extern crate xtensa_lx6_rt;
 
 use hal::prelude::*;
-use xtensa_lx6_rt::get_cycle_count;
+use xtensa_lx6::get_cycle_count;
 
 /// The default clock source is the onboard crystal
 /// In most cases 40mhz (but can be as low as 2mhz depending on the board)

examples/exception.rs

@@ -11,7 +11,7 @@ use esp32_hal::prelude::*;
 use esp32_hal::clock_control::{sleep, CPUSource::PLL, ClockControl};
 use esp32_hal::dport::Split;
 use esp32_hal::dprintln;
-use esp32_hal::interrupt::{Interrupt, Interrupt::*, InterruptLevel};
+use esp32_hal::interrupt::{clear_software_interrupt, Interrupt, Interrupt::*, InterruptLevel};
 use esp32_hal::serial::{config::Config, NoRx, NoTx, Serial};
 use esp32_hal::Core::PRO;
 
@@ -22,73 +22,73 @@ fn FROM_CPU_INTR0() {
     writeln!(
         TX.lock().as_mut().unwrap(),
         "  FROM_CPU_INTR0, level: {}",
-        xtensa_lx6_rt::interrupt::get_level()
+        xtensa_lx6::interrupt::get_level()
     )
     .unwrap();
-    interrupt::clear_software_interrupt(Interrupt::FROM_CPU_INTR0).unwrap();
+    clear_software_interrupt(Interrupt::FROM_CPU_INTR0).unwrap();
 }
 
 #[interrupt]
 fn FROM_CPU_INTR1() {
     writeln!(
         TX.lock().as_mut().unwrap(),
         "  Start FROM_CPU_INTR1, level: {}",
-        xtensa_lx6_rt::interrupt::get_level()
+        xtensa_lx6::interrupt::get_level()
     )
     .unwrap();
     interrupt::set_software_interrupt(Interrupt::FROM_CPU_INTR0).unwrap();
     interrupt::set_software_interrupt(Interrupt::FROM_CPU_INTR2).unwrap();
     writeln!(
         TX.lock().as_mut().unwrap(),
         "  End FROM_CPU_INTR1, level: {}",
-        xtensa_lx6_rt::interrupt::get_level()
+        xtensa_lx6::interrupt::get_level()
     )
     .unwrap();
-    interrupt::clear_software_interrupt(Interrupt::FROM_CPU_INTR1).unwrap();
+    clear_software_interrupt(Interrupt::FROM_CPU_INTR1).unwrap();
 }
 
 #[interrupt]
 fn FROM_CPU_INTR2() {
     writeln!(
         TX.lock().as_mut().unwrap(),
         "  FROM_CPU_INTR2, level: {}",
-        xtensa_lx6_rt::interrupt::get_level()
+        xtensa_lx6::interrupt::get_level()
     )
     .unwrap();
-    interrupt::clear_software_interrupt(Interrupt::FROM_CPU_INTR2).unwrap();
+    clear_software_interrupt(Interrupt::FROM_CPU_INTR2).unwrap();
 }
 
 #[interrupt]
 fn FROM_CPU_INTR3() {
     writeln!(
         TX.lock().as_mut().unwrap(),
         "  FROM_CPU_INTR3, level: {}",
-        xtensa_lx6_rt::interrupt::get_level()
+        xtensa_lx6::interrupt::get_level()
     )
     .unwrap();
-    interrupt::clear_software_interrupt(Interrupt::FROM_CPU_INTR3).unwrap();
+    clear_software_interrupt(Interrupt::FROM_CPU_INTR3).unwrap();
 }
 
 #[interrupt(INTERNAL_SOFTWARE_LEVEL_3_INTR)]
 fn software_level_3() {
     writeln!(
         TX.lock().as_mut().unwrap(),
         "  INTERNAL_SOFTWARE_LEVEL_3_INTR, level: {}",
-        xtensa_lx6_rt::interrupt::get_level()
+        xtensa_lx6::interrupt::get_level()
     )
     .unwrap();
-    interrupt::clear_software_interrupt(Interrupt::FROM_CPU_INTR3).unwrap();
+    clear_software_interrupt(Interrupt::FROM_CPU_INTR3).unwrap();
 }
 
 #[interrupt(INTERNAL_SOFTWARE_LEVEL_1_INTR)]
 fn random_name() {
     writeln!(
         TX.lock().as_mut().unwrap(),
         "  INTERNAL_SOFTWARE_LEVEL_1_INTR, level: {}",
-        xtensa_lx6_rt::interrupt::get_level()
+        xtensa_lx6::interrupt::get_level()
     )
     .unwrap();
-    interrupt::clear_software_interrupt(Interrupt::FROM_CPU_INTR3).unwrap();
+    clear_software_interrupt(Interrupt::FROM_CPU_INTR3).unwrap();
 }
 
 #[exception]
@@ -202,7 +202,7 @@ fn main() -> ! {
 
     loop {
         sleep(1.s());
-        xtensa_lx6_rt::interrupt::free(|_| {
+        interrupt::free(|_| {
             writeln!(TX.lock().as_mut().unwrap(), "Wait for watchdog reset").unwrap()
         });
     }