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Add rt feature to allow usage without runtime. #38

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27 changes: 15 additions & 12 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -5,33 +5,36 @@ authors = ["Scott Mabin <[email protected]>", "Arjan Mels <[email protected]>"]
edition = "2018"


# Allow overriding of memcpy, memset, etc.
# Allow overriding of `memcpy`, `memset`, etc.
[package.metadata.cargo-xbuild]
memcpy = false


[features]
default=["mem"]
default = ["mem", "rt"]

# Place program completely in ram (needed when e.g. using only ROM bootloader, or for debugging)
all_in_ram=[]
# Place program completely in RAM (needed when e.g. using only ROM bootloader, or for debugging).
all_in_ram = []

# Allow use of external ram. Needs customized bootloader.
external_ram=["esp32-hal-proc-macros/external_ram"]
# Allow use of external RAM. (Needs customized bootloader.)
external_ram = ["esp32-hal-proc-macros/external_ram"]

# Add support for Global Allocator
alloc=["linked_list_allocator"]
# Add support for global allocator.
alloc = ["linked_list_allocator"]

# Define memcpy, memset etc. as replacement of standard functions
mem=[]
# Define `memcpy`, `memset`, etc. as replacement of standard functions.
mem = []

# Enable the `rt` feature of the `esp32` crate.
rt = ["esp32/rt", "xtensa-lx6-rt"]


[dependencies]
esp32-hal-proc-macros = { path = "procmacros" }

xtensa-lx6-rt = "0.2.0"
xtensa-lx6-rt = { version = "0.2.0", optional = true }
xtensa-lx6 = "0.1.0"
esp32 = "0.5.0"
esp32 = { version = "0.5.0", default-features = false }
bare-metal = "0.2"
nb = "0.1.2"
spin = "0.5.2"
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2 changes: 2 additions & 0 deletions src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,7 @@ pub mod efuse;
#[cfg(feature = "external_ram")]
pub mod external_ram;
pub mod gpio;
#[cfg(feature = "rt")]
pub mod interrupt;
pub mod prelude;
pub mod serial;
Expand All @@ -54,6 +55,7 @@ pub mod mem;
/// ENTRY point is defined in memory.x
/// *Note: the pre_init function is called in the original reset handler
/// after the initializations done in this function*
#[cfg(feature = "rt")]
#[doc(hidden)]
#[no_mangle]
pub unsafe extern "C" fn ESP32Reset() -> ! {
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4 changes: 2 additions & 2 deletions src/prelude.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,8 @@
//!
//! This can be imported as use `esp32_hal::prelude::*`.

pub use xtensa_lx6_rt::entry;
pub use xtensa_lx6_rt::exception;
#[cfg(feature = "rt")]
pub use xtensa_lx6_rt::{entry, exception};

pub use crate::analog::SensExt;
pub use crate::gpio::GpioExt;
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2 changes: 1 addition & 1 deletion src/timer/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -170,7 +170,7 @@ macro_rules! timer {
Event::TimeOutEdge => self.enable_edge_interrupt(true),
};
unsafe {
interrupt::free(|_| {
xtensa_lx6::interrupt::free(|_| {
TIMER_MUTEX.lock();
(*(self.timg))
.int_ena_timers
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2 changes: 1 addition & 1 deletion src/timer/watchdog.rs
Original file line number Diff line number Diff line change
Expand Up @@ -182,7 +182,7 @@ impl<TIMG: TimerGroup> Watchdog<TIMG> {
timg.wdtconfig4.write(|w| unsafe { w.bits(per3) });
timg.wdtconfig5.write(|w| unsafe { w.bits(per4) });

interrupt::free(|_| {
xtensa_lx6::interrupt::free(|_| {
super::TIMER_MUTEX.lock();
timg.int_ena_timers.modify(|_, w| w.wdt_int_ena().set_bit());
});
Expand Down