Fix non-deterministic code generation

std::map with ptr as key has non-deterministic order of iterating
its members as ptr would be different from run to run. This non-
deterministic order causes visa to generate different code.

This PR fixes it by sorting map using a fixed value id. With this,
it will generate the same order of cvariables for vector alias for
the same input function.

Author: jgu222

IGC/Compiler/CISACodeGen/CShader.cpp

@@ -494,9 +494,9 @@ void CShader::CreateAliasVars()
     {
         // For each vector alias root, generate cvariable
         // for it and all its component sub-vector
-        for (auto& II : m_VRA->m_baseVecMap)
+        for (auto& II : m_VRA->m_sortedBaseVec)
         {
-            SBaseVecDesc* BV = II.second;
+            SBaseVecDesc* BV = II;
             Value* baseVal = BV->BaseVector;
             if (BV->Align != EALIGN_AUTO) {
                 // Need to set align on root cvar

IGC/Compiler/CISACodeGen/VariableReuseAnalysis.cpp

@@ -184,6 +184,8 @@ bool VariableReuseAnalysis::runOnFunction(Function& F)
 
         postProcessing();
 
+        sortAliasResult();
+
         if (IGC_IS_FLAG_ENABLED(DumpVariableAlias))
         {
             auto name =
@@ -751,6 +753,55 @@ void VariableReuseAnalysis::printAlias(raw_ostream& OS, const Function* F) const
     OS << "\n";
 }
 
+// Sort the final aliase info (baseVecmap) so that its order is deterministic.
+// CreateAliasVars() relies on this to generate cvariables in order.
+// (todo: use vector instead of map in the algorithm to avoid sorting.)
+void VariableReuseAnalysis::sortAliasResult()
+{
+    if (m_baseVecMap.empty()) {
+        return;
+    }
+
+    Function* F = m_F;
+    // Assign each inst/arg a unique integer so that the output
+    // would be in order. It is useful when doing comparison.
+    DenseMap<const Value*, int> Val2IntMap;
+    int id = 0;
+    if (F) {
+        // All arguments
+        for (auto AI = F->arg_begin(), AE = F->arg_end(); AI != AE; ++AI) {
+            const Value* aVal = AI;
+            Val2IntMap[aVal] = (++id);
+        }
+        // All instructions
+        for (auto II = inst_begin(F), IE = inst_end(F); II != IE; ++II) {
+            const Instruction* Inst = &*II;
+            Val2IntMap[(Value*)Inst] = (++id);
+        }
+    }
+
+    auto SubVecCmp = [&](const SSubVecDesc* SV0, const SSubVecDesc* SV1) {
+        int n0 = Val2IntMap[SV0->Aliaser];
+        int n1 = Val2IntMap[SV1->Aliaser];
+        return n0 < n1;
+        };
+
+    auto BaseVecCmp = [&](const SBaseVecDesc* BV0, const SBaseVecDesc* BV1) {
+        int n0 = Val2IntMap[BV0->BaseVector];
+        int n1 = Val2IntMap[BV1->BaseVector];
+        return n0 < n1;
+        };
+
+
+    m_sortedBaseVec.clear();
+    for (auto& MI : m_baseVecMap) {
+        SBaseVecDesc* BV = MI.second;
+        std::sort(BV->Aliasers.begin(), BV->Aliasers.end(), SubVecCmp);
+        m_sortedBaseVec.push_back(BV);
+    }
+    std::sort(m_sortedBaseVec.begin(), m_sortedBaseVec.end(), BaseVecCmp);
+}
+
 void VariableReuseAnalysis::dumpAlias() const
 {
     printAlias(dbgs(), m_F);

IGC/Compiler/CISACodeGen/VariableReuseAnalysis.hpp

@@ -27,7 +27,7 @@ SPDX-License-Identifier: MIT
 #include "common/LLVMWarningsPop.hpp"
 #include "Compiler/CISACodeGen/RegisterEstimator.hpp"
 #include <list>
-#include <map>
+#include <unordered_map>
 #include <algorithm>
 #include "Probe/Assertion.h"
 
@@ -190,8 +190,8 @@ namespace IGC {
         ~VariableReuseAnalysis() {}
 
         typedef llvm::SmallVector<SVecInsEltInfo, 32> VecInsEltInfoTy;
-        typedef std::map<llvm::Value*, SSubVecDesc*> AliasMapTy;  // ordered map
-        typedef std::map<llvm::Value*, SBaseVecDesc*> BaseVecMapTy;
+        typedef std::unordered_map<llvm::Value*, SSubVecDesc*> AliasMapTy;
+        typedef std::unordered_map<llvm::Value*, SBaseVecDesc*> BaseVecMapTy;
         typedef llvm::SmallVector<llvm::Value*, 32> ValueVectorTy;
         typedef llvm::DenseMap<llvm::Value*, llvm::Value*> Val2ValMapTy;
 
@@ -324,11 +324,11 @@ namespace IGC {
         //   subAlias(v, 2, 2) = {s2, s3, v}  // only s2&s3 overlaps V[2:3]
         //   dessaCC(s0) = { values in the same dessa CC }
         //
-        //   [todo] add Algo here.
-        //
         AliasMapTy  m_aliasMap;
         BaseVecMapTy m_baseVecMap;
 
+        // sorted m_baseVecMap for creating cvar in derministic order
+        llvm::SmallVector<SBaseVecDesc*, 16> m_sortedBaseVec;
 
         // Function argument cannot be made a sub-part of another bigger
         // value as it has been assigned a fixed physical GRF. The following
@@ -380,6 +380,7 @@ namespace IGC {
             m_IsBlockPressureLow = Status::Undef;
             m_aliasMap.clear();
             m_baseVecMap.clear();
+            m_sortedBaseVec.clear();
             m_root2AliasMap.clear();
             m_HasBecomeNoopInsts.clear();
             m_LifetimeAt1stDefOfBB.clear();
@@ -412,6 +413,8 @@ namespace IGC {
             BlockCoalescing* theBC);
         void postProcessing();
 
+        void sortAliasResult();
+
         // Return true if this instruction can be converted to an alias
         bool canBeAlias(llvm::CastInst* I);