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petechouigcbot
petechou
authored and
igcbot
committed
minor code refactoring.
minor code refactoring.
1 parent 005c343 commit c55fed4

16 files changed

+203
-196
lines changed

‎visa/BuildIR.h

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1470,16 +1470,18 @@ class IR_Builder {
14701470

14711471
G4_INST *createDpasInst(G4_opcode opc, G4_ExecSize execSize,
14721472
G4_DstRegRegion *dst, G4_Operand *src0,
1473-
G4_Operand *src1, G4_Operand *src2, G4_Operand *src3,
1473+
G4_Operand *src1, G4_Operand *src2,
1474+
G4_Operand *src3, G4_Operand *src4,
14741475
G4_InstOpts options, GenPrecision A, GenPrecision W,
14751476
uint8_t D, uint8_t C, bool addToInstList);
14761477

14771478
G4_INST *createInternalDpasInst(G4_opcode opc, G4_ExecSize execSize,
14781479
G4_DstRegRegion *dst, G4_Operand *src0,
14791480
G4_Operand *src1, G4_Operand *src2,
1480-
G4_Operand *src3, G4_InstOpts options,
1481-
GenPrecision A, GenPrecision W, uint8_t D,
1482-
uint8_t C);
1481+
G4_InstOpts options, GenPrecision A,
1482+
GenPrecision W, uint8_t D, uint8_t C,
1483+
G4_Operand *src3 = nullptr,
1484+
G4_Operand *src4 = nullptr);
14831485

14841486
G4_INST *createBfnInst(uint8_t booleanFuncCtrl, G4_Predicate *prd,
14851487
G4_CondMod *mod, G4_Sat sat, G4_ExecSize execSize,
@@ -1531,7 +1533,8 @@ class IR_Builder {
15311533
G4_SrcRegRegion *src0Opnd,
15321534
G4_SrcRegRegion *src1Opnd,
15331535
G4_SrcRegRegion *src2Opnd,
1534-
G4_SrcRegRegion *src3Opnd, GenPrecision A,
1536+
G4_SrcRegRegion *src3Opnd,
1537+
G4_SrcRegRegion *src4Opnd, GenPrecision A,
15351538
GenPrecision W, uint8_t D, uint8_t C);
15361539
int translateVISABfnInst(uint8_t booleanFuncCtrl,
15371540
VISA_Exec_Size executionSize, VISA_EMask_Ctrl emask,

‎visa/BuildIRImpl.cpp

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1772,11 +1772,12 @@ G4_INST *IR_Builder::createCFInst(G4_Predicate *prd, G4_opcode op,
17721772
G4_INST *IR_Builder::createDpasInst(G4_opcode opc, G4_ExecSize execSize,
17731773
G4_DstRegRegion *dst, G4_Operand *src0,
17741774
G4_Operand *src1, G4_Operand *src2,
1775-
G4_Operand *src3, G4_InstOpts options,
1776-
GenPrecision A, GenPrecision W, uint8_t D,
1777-
uint8_t C, bool addToInstList) {
1775+
G4_Operand *src3, G4_Operand *src4,
1776+
G4_InstOpts options, GenPrecision A,
1777+
GenPrecision W, uint8_t D, uint8_t C,
1778+
bool addToInstList) {
17781779
G4_INST *i = new (mem) G4_InstDpas(*this, opc, execSize, dst, src0, src1,
1779-
src2, src3, options, A, W, D, C);
1780+
src2, src3, src4, options, A, W, D, C);
17801781

17811782
if (addToInstList) {
17821783
i->setVISAId(curCISAOffset);
@@ -1793,12 +1794,10 @@ G4_INST *IR_Builder::createDpasInst(G4_opcode opc, G4_ExecSize execSize,
17931794

17941795
G4_INST *IR_Builder::createInternalDpasInst(
17951796
G4_opcode opc, G4_ExecSize execSize, G4_DstRegRegion *dst, G4_Operand *src0,
1796-
G4_Operand *src1, G4_Operand *src2, G4_Operand *src3, G4_InstOpts options,
1797-
GenPrecision A, GenPrecision W, uint8_t D, uint8_t C) {
1798-
auto ii = createDpasInst(opc, execSize, dst, src0, src1, src2, nullptr,
1799-
options, A, W, D, C, false);
1800-
1801-
return ii;
1797+
G4_Operand *src1, G4_Operand *src2, G4_InstOpts options, GenPrecision A,
1798+
GenPrecision W, uint8_t D, uint8_t C, G4_Operand *src3, G4_Operand *src4) {
1799+
return createDpasInst(opc, execSize, dst, src0, src1, src2, src3, src4,
1800+
options, A, W, D, C, false);
18021801
}
18031802

18041803
G4_INST *IR_Builder::createBfnInst(uint8_t booleanFuncCtrl, G4_Predicate *prd,

‎visa/G4_IR.cpp

Lines changed: 72 additions & 73 deletions
Original file line numberDiff line numberDiff line change
@@ -206,6 +206,20 @@ G4_INST::G4_INST(const IR_Builder &irb, G4_Predicate *prd, G4_opcode o,
206206
initOperands();
207207
}
208208

209+
G4_INST::G4_INST(const IR_Builder &irb, G4_Predicate *prd, G4_opcode o,
210+
G4_CondMod *m, G4_Sat s, G4_ExecSize size, G4_DstRegRegion *d,
211+
G4_Operand *s0, G4_Operand *s1, G4_Operand *s2, G4_Operand *s3,
212+
G4_Operand *s4, G4_InstOpts opt)
213+
: op(o), dst(d), predicate(prd), mod(m), option(opt),
214+
useInstList(irb.getAllocator()), defInstList(irb.getAllocator()),
215+
sat(s ? true : false), dead(false), evenlySplitInst(false),
216+
doPostRA(false), canBeAcc(false), doNotDelete(false), execSize(size),
217+
builder(irb) {
218+
vISA_ASSERT(isDpas(), "Currently only dpas variants support 5 srcs");
219+
srcs = {s0, s1, s2, s3, s4};
220+
initOperands();
221+
}
222+
209223
G4_INST::G4_INST(const IR_Builder &irb, G4_Predicate *prd, G4_opcode o,
210224
G4_CondMod *m, G4_Sat s, G4_ExecSize size, G4_DstRegRegion *d,
211225
G4_Operand *s0, G4_Operand *s1, G4_Operand *s2, G4_Operand *s3,
@@ -2682,26 +2696,19 @@ bool G4_INST::goodTwoGRFDst(bool &evenSplitDst) const {
26822696
// propagation
26832697
bool G4_INST::isWARdep(G4_INST *inst) {
26842698
G4_Operand *msg0 = NULL;
2685-
G4_Operand *src0_0 = inst->getSrc(0);
2686-
G4_Operand *src0_1 = inst->getSrc(1);
2687-
G4_Operand *src0_2 = inst->getSrc(2);
2688-
G4_Operand *src0_3 = inst->getSrc(3);
26892699
G4_Operand *implicitSrc0 = inst->getImplAccSrc();
26902700
G4_Predicate *pred0 = inst->getPredicate();
26912701

26922702
G4_Operand *dst1 = dst;
26932703

26942704
if (dst1 && !hasNULLDst()) {
26952705

2696-
if ((src0_0 &&
2697-
src0_0->compareOperand(dst1, getBuilder()) != Rel_disjoint) ||
2698-
(src0_1 &&
2699-
src0_1->compareOperand(dst1, getBuilder()) != Rel_disjoint) ||
2700-
(src0_2 &&
2701-
src0_2->compareOperand(dst1, getBuilder()) != Rel_disjoint) ||
2702-
(src0_3 &&
2703-
src0_3->compareOperand(dst1, getBuilder()) != Rel_disjoint) ||
2704-
(msg0 && (msg0->compareOperand(dst1, getBuilder()) != Rel_disjoint)) ||
2706+
if (std::any_of(inst->src_begin(), inst->src_end(), [&](G4_Operand *src) {
2707+
return src->compareOperand(dst1, getBuilder()) != Rel_disjoint;
2708+
}))
2709+
return true;
2710+
2711+
if ((msg0 && (msg0->compareOperand(dst1, getBuilder()) != Rel_disjoint)) ||
27052712
(pred0 &&
27062713
(pred0->compareOperand(dst1, getBuilder()) != Rel_disjoint)) ||
27072714
(implicitSrc0 &&
@@ -2711,29 +2718,27 @@ bool G4_INST::isWARdep(G4_INST *inst) {
27112718
}
27122719

27132720
if (mod) {
2714-
if ((pred0 && pred0->compareOperand(mod, getBuilder()) != Rel_disjoint) ||
2715-
(src0_0 && src0_0->isFlag() &&
2716-
src0_0->compareOperand(mod, getBuilder()) != Rel_disjoint) ||
2717-
(src0_1 && src0_1->isFlag() &&
2718-
src0_1->compareOperand(mod, getBuilder()) != Rel_disjoint) ||
2719-
(src0_2 && src0_2->isFlag() &&
2720-
src0_2->compareOperand(mod, getBuilder()) != Rel_disjoint)) {
2721+
if (pred0 && pred0->compareOperand(mod, getBuilder()) != Rel_disjoint)
2722+
return true;
2723+
2724+
if (std::any_of(inst->src_begin(), inst->src_end(), [&](G4_Operand *src) {
2725+
return src->isFlag() &&
2726+
src->compareOperand(mod, getBuilder()) != Rel_disjoint;
2727+
}))
27212728
return true;
2722-
}
27232729
}
27242730

27252731
auto implAccDst = getImplAccDst();
27262732
if (implAccDst) {
2727-
if ((implicitSrc0 && implicitSrc0->compareOperand(
2728-
implAccDst, getBuilder()) != Rel_disjoint) ||
2729-
(src0_0 && src0_0->isAccReg() &&
2730-
src0_0->compareOperand(implAccDst, getBuilder()) != Rel_disjoint) ||
2731-
(src0_1 && src0_1->isAccReg() &&
2732-
src0_1->compareOperand(implAccDst, getBuilder()) != Rel_disjoint) ||
2733-
(src0_2 && src0_2->isAccReg() &&
2734-
src0_2->compareOperand(implAccDst, getBuilder()) != Rel_disjoint)) {
2733+
if (implicitSrc0 && implicitSrc0->compareOperand(
2734+
implAccDst, getBuilder()) != Rel_disjoint)
2735+
return true;
2736+
2737+
if (std::any_of(inst->src_begin(), inst->src_end(), [&](G4_Operand *src) {
2738+
return src->isAccReg() &&
2739+
src->compareOperand(implAccDst, getBuilder()) != Rel_disjoint;
2740+
}))
27352741
return true;
2736-
}
27372742
}
27382743
return false;
27392744
}
@@ -2783,52 +2788,46 @@ bool G4_INST::isRAWdep(G4_INST *inst) {
27832788
G4_CondMod *cMod0 = inst->getCondMod();
27842789
G4_Operand *implicitDst0 = inst->getImplAccDst();
27852790
G4_Predicate *pred1 = getPredicate();
2786-
G4_Operand *src1_0 = getSrc(0);
2787-
G4_Operand *src1_1 = getSrc(1);
2788-
G4_Operand *src1_2 = getSrc(2);
2789-
G4_Operand *src1_3 = getSrc(3);
27902791
G4_Operand *implicitSrc1 = getImplAccSrc();
27912792

2792-
bool NULLSrc1 = (opcode() == G4_math && src1_1->isNullReg());
27932793
if (dst0 && !inst->hasNULLDst()) {
2794-
if ((src1_0 &&
2795-
src1_0->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2796-
(src1_1 && !NULLSrc1 &&
2797-
src1_1->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2798-
(src1_2 &&
2799-
src1_2->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2800-
(src1_3 &&
2801-
src1_3->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2802-
(pred1 && pred1->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2794+
if (std::any_of(src_begin(), src_end(), [&](G4_Operand *src) {
2795+
// TODO: check if we can remove the null src1 check for math as
2796+
// compareOperand should handle NullReg already.
2797+
if (opcode() == G4_math && src == getSrc(1) && src->isNullReg())
2798+
return false;
2799+
return src->compareOperand(dst0, getBuilder()) != Rel_disjoint;
2800+
}))
2801+
return true;
2802+
2803+
if ((pred1 && pred1->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
28032804
(implicitSrc1 &&
28042805
implicitSrc1->compareOperand(dst0, getBuilder()) != Rel_disjoint)) {
28052806
return true;
28062807
}
28072808
}
28082809

28092810
if (cMod0 && cMod0->getBase()) {
2810-
if ((pred1 && pred1->compareOperand(cMod0, getBuilder()) != Rel_disjoint) ||
2811-
(src1_0 && src1_0->isFlag() &&
2812-
src1_0->compareOperand(cMod0, getBuilder()) != Rel_disjoint) ||
2813-
(src1_2 && src1_2->isFlag() &&
2814-
src1_2->compareOperand(cMod0, getBuilder()) != Rel_disjoint) ||
2815-
(src1_1 && src1_1->isFlag() &&
2816-
src1_1->compareOperand(cMod0, getBuilder()) != Rel_disjoint)) {
2811+
if (pred1 && pred1->compareOperand(cMod0, getBuilder()) != Rel_disjoint)
2812+
return true;
2813+
2814+
if (std::any_of(src_begin(), src_end(), [&](G4_Operand *src) {
2815+
return src->isFlag() &&
2816+
src->compareOperand(cMod0, getBuilder()) != Rel_disjoint;
2817+
}))
28172818
return true;
2818-
}
28192819
}
28202820

28212821
if (implicitDst0) {
2822-
if ((implicitSrc1 && implicitSrc1->compareOperand(
2823-
implicitDst0, getBuilder()) != Rel_disjoint) ||
2824-
(src1_0 && src1_0->isAccReg() &&
2825-
src1_0->compareOperand(implicitDst0, getBuilder()) != Rel_disjoint) ||
2826-
(src1_2 && src1_2->isAccReg() &&
2827-
src1_2->compareOperand(implicitDst0, getBuilder()) != Rel_disjoint) ||
2828-
(src1_1 && src1_1->isAccReg() &&
2829-
src1_1->compareOperand(implicitDst0, getBuilder()) != Rel_disjoint)) {
2822+
if (implicitSrc1 && implicitSrc1->compareOperand(
2823+
implicitDst0, getBuilder()) != Rel_disjoint)
2824+
return true;
2825+
2826+
if (std::any_of(src_begin(), src_end(), [&](G4_Operand *src) {
2827+
return src->isAccReg() &&
2828+
src->compareOperand(implicitDst0, getBuilder()) != Rel_disjoint;
2829+
}))
28302830
return true;
2831-
}
28322831
}
28332832
return false;
28342833
}
@@ -7837,10 +7836,10 @@ G4_INST *G4_InstDpas::cloneInst(const IR_Builder *b) {
78377836
auto src1 = nonConstBuilder->duplicateOperand(getSrc(1));
78387837
auto src2 = nonConstBuilder->duplicateOperand(getSrc(2));
78397838
auto src3 = nonConstBuilder->duplicateOperand(getSrc(3));
7839+
auto src4 = nonConstBuilder->duplicateOperand(getSrc(4));
78407840
return nonConstBuilder->createInternalDpasInst(
7841-
op, getExecSize(), dst, src0, src1, src2, src3, option,
7842-
getSrc2Precision(), getSrc1Precision(), getSystolicDepth(),
7843-
getRepeatCount());
7841+
op, getExecSize(), dst, src0, src1, src2, option, getSrc2Precision(),
7842+
getSrc1Precision(), getSystolicDepth(), getRepeatCount(), src3, src4);
78447843
}
78457844

78467845
bool G4_InstDpas::isInt() const {
@@ -7894,9 +7893,9 @@ uint8_t G4_InstDpas::getOpsPerChan() const {
78947893
void G4_InstDpas::computeRightBound(G4_Operand *opnd) {
78957894
associateOpndWithInst(opnd, this);
78967895
if (opnd && !opnd->isImm() && !opnd->isNullReg()) {
7897-
G4_InstDpas *dpasInst = asDpasInst();
7898-
uint8_t D = dpasInst->getSystolicDepth();
7899-
uint8_t C = dpasInst->getRepeatCount();
7896+
uint8_t D = getSystolicDepth();
7897+
uint8_t C = getRepeatCount();
7898+
G4_ExecSize ES = getExecSize();
79007899

79017900
auto computeDpasOperandBound = [this](G4_Operand *opnd, unsigned leftBound,
79027901
unsigned rightBound) {
@@ -7908,24 +7907,24 @@ void G4_InstDpas::computeRightBound(G4_Operand *opnd) {
79087907
if (opnd == dst || (opnd == srcs[0] && !opnd->isNullReg())) {
79097908
// dst and src0 are always packed, and RB is exec_size * type_size *
79107909
// rep_count
7911-
auto opndSize = dpasInst->getExecSize() * opnd->getTypeSize() * C;
7910+
auto opndSize = ES * opnd->getTypeSize() * C;
79127911
computeDpasOperandBound(opnd, opnd->left_bound,
79137912
opnd->left_bound + opndSize - 1);
79147913
} else if (opnd == srcs[1]) {
7915-
uint32_t bytesPerLane = dpasInst->getSrc1SizePerLaneInByte();
7914+
uint32_t bytesPerLane = getSrc1SizePerLaneInByte();
79167915
uint8_t src1_D = D;
79177916

79187917
// Each lanes needs (src1_D * bytesPerLane) bytes, and it's multiple of
79197918
// DW!
79207919
uint32_t bytesPerLaneForAllDepth = bytesPerLane * src1_D;
79217920
bytesPerLaneForAllDepth = ((bytesPerLaneForAllDepth + 3) / 4) * 4;
79227921

7923-
uint32_t bytes = bytesPerLaneForAllDepth * dpasInst->getExecSize();
7922+
uint32_t bytes = bytesPerLaneForAllDepth * ES;
79247923
computeDpasOperandBound(opnd, opnd->left_bound,
79257924
opnd->left_bound + bytes - 1);
79267925
} else if (opnd == srcs[2]) {
79277926
// src2 is uniform.
7928-
uint32_t bytesPerLane = dpasInst->getSrc2SizePerLaneInByte();
7927+
uint32_t bytesPerLane = getSrc2SizePerLaneInByte();
79297928
uint32_t bytes = bytesPerLane * D * C;
79307929
if (op == G4_dpasw) {
79317930
bytes = bytesPerLane * D * ((C + 1) / 2);
@@ -7936,10 +7935,10 @@ void G4_InstDpas::computeRightBound(G4_Operand *opnd) {
79367935

79377936
else if (opnd && opnd == srcs[3]) {
79387937
uint32_t bytes;
7939-
if (dpasInst->isInt())
7938+
if (isInt())
79407939
{
79417940
bytes = 2 * getBuilder().getGRFSize();
7942-
} else if (dpasInst->isFP16() || dpasInst->isBF16()) {
7941+
} else if (isFP16() || isBF16()) {
79437942
bytes = getBuilder().getGRFSize();
79447943
} else { // isTF32()
79457944
bytes = getBuilder().getGRFSize() / 2;

‎visa/G4_IR.hpp

Lines changed: 17 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -126,7 +126,13 @@ class G4_INST {
126126

127127
protected:
128128
G4_opcode op;
129-
llvm::SmallVector<G4_Operand *, G4_MAX_SRCS> srcs;
129+
// Reserve 4 sources should be enough for most of instructions.
130+
// TODO: In fact, we would reserve not just 4 but also set the size of "srcs"
131+
// to 4. Currently there is some legacy code that presumes srcs[0:3] are
132+
// always accessible for updates, and refactoring the code appears to be
133+
// a challenge. We probably should still pursue the opportunity to remove that
134+
// presumption and make the code cleaner.
135+
llvm::SmallVector<G4_Operand *, /*N=*/4> srcs;
130136
G4_DstRegRegion *dst;
131137
G4_Predicate *predicate;
132138
G4_CondMod *mod;
@@ -286,6 +292,11 @@ class G4_INST {
286292
G4_Sat s, G4_ExecSize size, G4_DstRegRegion *d, G4_Operand *s0,
287293
G4_Operand *s1, G4_Operand *s2, G4_Operand *s3, G4_InstOpts opt);
288294

295+
G4_INST(const IR_Builder &irb, G4_Predicate *prd, G4_opcode o, G4_CondMod *m,
296+
G4_Sat s, G4_ExecSize size, G4_DstRegRegion *d, G4_Operand *s0,
297+
G4_Operand *s1, G4_Operand *s2, G4_Operand *s3, G4_Operand *s4,
298+
G4_InstOpts opt);
299+
289300
G4_INST(const IR_Builder &irb, G4_Predicate *prd, G4_opcode o, G4_CondMod *m,
290301
G4_Sat s, G4_ExecSize size, G4_DstRegRegion *d, G4_Operand *s0,
291302
G4_Operand *s1, G4_Operand *s2, G4_Operand *s3, G4_Operand *s4,
@@ -655,6 +666,8 @@ class G4_INST {
655666
return Opnd_src2;
656667
case 3:
657668
return Opnd_src3;
669+
case 4:
670+
return Opnd_src4;
658671
default:
659672
vISA_ASSERT_UNREACHABLE("bad source id");
660673
return Opnd_src0;
@@ -1021,10 +1034,10 @@ class G4_InstDpas : public G4_INST {
10211034

10221035
G4_InstDpas(const IR_Builder &builder, G4_opcode o, G4_ExecSize size,
10231036
G4_DstRegRegion *d, G4_Operand *s0, G4_Operand *s1,
1024-
G4_Operand *s2, G4_Operand *s3, G4_InstOpts opt, GenPrecision a,
1025-
GenPrecision w, uint8_t sd, uint8_t rc)
1037+
G4_Operand *s2, G4_Operand *s3, G4_Operand *s4, G4_InstOpts opt,
1038+
GenPrecision a, GenPrecision w, uint8_t sd, uint8_t rc)
10261039
: G4_INST(builder, nullptr, o, nullptr, g4::NOSAT, size, d, s0, s1, s2,
1027-
s3, opt),
1040+
s3, s4, opt),
10281041
Src2Precision(a), Src1Precision(w), SystolicDepth(sd), RepeatCount(rc) {
10291042
}
10301043

‎visa/G4_Opcode.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,8 @@ SPDX-License-Identifier: MIT
1212
#include "common.h"
1313
#include "visa_igc_common_header.h"
1414

15-
#define G4_MAX_SRCS 4
15+
// TODO: Probably should get rid of G4_MAX_SRCS constant at some point.
16+
#define G4_MAX_SRCS 5
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#define G4_MAX_INTRINSIC_SRCS 8
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#define UNDEFINED_VAL 0xFFFFFFFF
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#define UNDEFINED_SHORT 0x8000

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